From 15f3b5baad237ef343278cc52fa17e97c7af232b Mon Sep 17 00:00:00 2001
From: Saurabh Jha <saurabh.jha@arm.com>
Date: Wed, 10 Jan 2024 11:10:07 +0000
Subject: gas: aarch64: Add system registers for Debug and PMU extensions

This patch adds support for the new AArch64 system registers that are part of the following extensions:
 * FEAT_DEBUGv8p9
 * FEAT_PMUv3p9
 * FEAT_PMUv3_SS
 * FEAT_PMUv3_ICNTR
 * FEAT_SEBEP
---
 opcodes/aarch64-sys-regs.def | 41 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

(limited to 'opcodes/aarch64-sys-regs.def')

diff --git a/opcodes/aarch64-sys-regs.def b/opcodes/aarch64-sys-regs.def
index 054c12c..6a94817 100644
--- a/opcodes/aarch64-sys-regs.def
+++ b/opcodes/aarch64-sys-regs.def
@@ -570,6 +570,7 @@
   SYSREG ("mdcr_el3",		CPENC (3,6,1,3,1),	0,			AARCH64_NO_FEATURES)
   SYSREG ("mdrar_el1",		CPENC (2,0,1,0,0),	F_REG_READ,		AARCH64_NO_FEATURES)
   SYSREG ("mdscr_el1",		CPENC (2,0,0,2,2),	0,			AARCH64_NO_FEATURES)
+  SYSREG ("mdselr_el1",		CPENC (2,0,0,4,2),	F_ARCHEXT,		AARCH64_FEATURE (DEBUGv8p9))
   SYSREG ("mecid_a0_el2",	CPENC (3,4,10,8,1),	0,			AARCH64_NO_FEATURES)
   SYSREG ("mecid_a1_el2",	CPENC (3,4,10,8,3),	0,			AARCH64_NO_FEATURES)
   SYSREG ("mecid_p0_el2",	CPENC (3,4,10,8,0),	0,			AARCH64_NO_FEATURES)
@@ -626,11 +627,13 @@
   SYSREG ("pmbsr_el1",		CPENC (3,0,9,10,3),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmccfiltr_el0",	CPENC (3,3,14,15,7),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmccntr_el0",	CPENC (3,3,9,13,0),	0,			AARCH64_NO_FEATURES)
+  SYSREG ("pmccntsvr_el1",	CPENC (2,0,14,11,7),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
   SYSREG ("pmceid0_el0",	CPENC (3,3,9,12,6),	F_REG_READ,		AARCH64_NO_FEATURES)
   SYSREG ("pmceid1_el0",	CPENC (3,3,9,12,7),	F_REG_READ,		AARCH64_NO_FEATURES)
   SYSREG ("pmcntenclr_el0",	CPENC (3,3,9,12,2),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmcntenset_el0",	CPENC (3,3,9,12,1),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmcr_el0",		CPENC (3,3,9,12,0),	0,			AARCH64_NO_FEATURES)
+  SYSREG ("pmecr_el1",		CPENC (3,0,9,14,5),	F_ARCHEXT,		AARCH64_FEATURE (SEBEP))
   SYSREG ("pmevcntr0_el0",	CPENC (3,3,14,8,0),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevcntr10_el0",	CPENC (3,3,14,9,2),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevcntr11_el0",	CPENC (3,3,14,9,3),	0,			AARCH64_NO_FEATURES)
@@ -662,6 +665,37 @@
   SYSREG ("pmevcntr7_el0",	CPENC (3,3,14,8,7),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevcntr8_el0",	CPENC (3,3,14,9,0),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevcntr9_el0",	CPENC (3,3,14,9,1),	0,			AARCH64_NO_FEATURES)
+  SYSREG ("pmevcntsvr0_el1",	CPENC (2,0,14,8,0),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr10_el1",	CPENC (2,0,14,9,2),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr11_el1",	CPENC (2,0,14,9,3),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr12_el1",	CPENC (2,0,14,9,4),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr13_el1",	CPENC (2,0,14,9,5),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr14_el1",	CPENC (2,0,14,9,6),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr15_el1",	CPENC (2,0,14,9,7),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr16_el1",	CPENC (2,0,14,10,0),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr17_el1",	CPENC (2,0,14,10,1),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr18_el1",	CPENC (2,0,14,10,2),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr19_el1",	CPENC (2,0,14,10,3),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr1_el1",	CPENC (2,0,14,8,1),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr20_el1",	CPENC (2,0,14,10,4),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr21_el1",	CPENC (2,0,14,10,5),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr22_el1",	CPENC (2,0,14,10,6),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr23_el1",	CPENC (2,0,14,10,7),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr24_el1",	CPENC (2,0,14,11,0),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr25_el1",	CPENC (2,0,14,11,1),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr26_el1",	CPENC (2,0,14,11,2),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr27_el1",	CPENC (2,0,14,11,3),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr28_el1",	CPENC (2,0,14,11,4),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr29_el1",	CPENC (2,0,14,11,5),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr2_el1",	CPENC (2,0,14,8,2),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr30_el1",	CPENC (2,0,14,11,6),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr3_el1",	CPENC (2,0,14,8,3),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr4_el1",	CPENC (2,0,14,8,4),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr5_el1",	CPENC (2,0,14,8,5),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr6_el1",	CPENC (2,0,14,8,6),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr7_el1",	CPENC (2,0,14,8,7),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr8_el1",	CPENC (2,0,14,9,0),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
+  SYSREG ("pmevcntsvr9_el1",	CPENC (2,0,14,9,1),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_SS))
   SYSREG ("pmevtyper0_el0",	CPENC (3,3,14,12,0),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevtyper10_el0",	CPENC (3,3,14,13,2),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevtyper11_el0",	CPENC (3,3,14,13,3),	0,			AARCH64_NO_FEATURES)
@@ -693,6 +727,10 @@
   SYSREG ("pmevtyper7_el0",	CPENC (3,3,14,12,7),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevtyper8_el0",	CPENC (3,3,14,13,0),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmevtyper9_el0",	CPENC (3,3,14,13,1),	0,			AARCH64_NO_FEATURES)
+  SYSREG ("pmiar_el1",		CPENC (3,0,9,14,7),	F_ARCHEXT,		AARCH64_FEATURE (SEBEP))
+  SYSREG ("pmicfiltr_el0",	CPENC (3,3,9,6,0),	F_ARCHEXT,		AARCH64_FEATURE (PMUv3_ICNTR))
+  SYSREG ("pmicntr_el0",	CPENC (3,3,9,4,0),	F_ARCHEXT,		AARCH64_FEATURE (PMUv3_ICNTR))
+  SYSREG ("pmicntsvr_el1",	CPENC (2,0,14,12,0),	F_REG_READ|F_ARCHEXT,   AARCH64_FEATURE (PMUv3_SS))
   SYSREG ("pmintenclr_el1",	CPENC (3,0,9,14,2),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmintenset_el1",	CPENC (3,0,9,14,1),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmmir_el1",		CPENC (3,0,9,14,6),	F_REG_READ|F_ARCHEXT,	AARCH64_FEATURE (V8_4A))
@@ -710,10 +748,13 @@
   SYSREG ("pmsirr_el1",		CPENC (3,0,9,9,3),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmslatfr_el1",	CPENC (3,0,9,9,6),	F_ARCHEXT,		AARCH64_FEATURE (PROFILE))
   SYSREG ("pmsnevfr_el1",	CPENC (3,0,9,9,1),	F_ARCHEXT,		AARCH64_FEATURE (V8_7A))
+  SYSREG ("pmsscr_el1",		CPENC (3,0,9,13,3),	F_ARCHEXT,		AARCH64_FEATURE (PMUv3_SS))
   SYSREG ("pmswinc_el0",	CPENC (3,3,9,12,4),	F_REG_WRITE,		AARCH64_NO_FEATURES)
+  SYSREG ("pmuacr_el1",		CPENC (3,0,9,14,4),	F_ARCHEXT,		AARCH64_FEATURE (PMUv3p9))
   SYSREG ("pmuserenr_el0",	CPENC (3,3,9,14,0),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmxevcntr_el0",	CPENC (3,3,9,13,2),	0,			AARCH64_NO_FEATURES)
   SYSREG ("pmxevtyper_el0",	CPENC (3,3,9,13,1),	0,			AARCH64_NO_FEATURES)
+  SYSREG ("pmzr_el0",		CPENC (3,3,9,13,4),	F_REG_WRITE|F_ARCHEXT,	AARCH64_FEATURE (PMUv3_ICNTR))
   SYSREG ("por_el0",		CPENC (3,3,10,2,4),	F_ARCHEXT,		AARCH64_FEATURE (S1POE))
   SYSREG ("por_el1",		CPENC (3,0,10,2,4),	F_ARCHEXT,		AARCH64_FEATURE (S1POE))
   SYSREG ("por_el12",		CPENC (3,5,10,2,4),	F_ARCHEXT,		AARCH64_FEATURE (S1POE))
-- 
cgit v1.1

