From 535b785fb0c97220dea23a18f07baad6b5d77ae5 Mon Sep 17 00:00:00 2001
From: Alan Modra <amodra@gmail.com>
Date: Thu, 18 May 2017 14:47:40 +0930
Subject: Don't compare boolean values against TRUE or FALSE

bfd/
	* arc-got.h: Don't compare boolean values against TRUE or FALSE.
	* elf-m10300.c: Likewise.
	* elf.c: Likewise.
	* elf32-arc.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-nds32.c: Likewise.
	* elf32-tilepro.c: Likewise.
	* elflink.c: Likewise.
	* elfnn-aarch64.c: Likewise.
	* elfnn-riscv.c: Likewise.
	* elfxx-tilegx.c: Likewise.
	* mach-o.c: Likewise.
	* peXXigen.c: Likewise.
	* vms-alpha.c: Likewise.
	* vms-lib.c: Likewise.
opcodes/
	* aarch64-asm.c: Don't compare boolean values against TRUE or FALSE.
	* aarch64-dis.c: Likewise.
	* aarch64-gen.c: Likewise.
	* aarch64-opc.c: Likewise.
binutils/
	* strings.c: Don't compare boolean values against TRUE or FALSE.
gas/
	* config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE.
	* config/tc-hppa.c: Likewise.
	* config/tc-mips.c: Likewise.
	* config/tc-score7.c: Likewise.
ld/
	* emultempl/elf32.em: Don't compare boolean values against TRUE or FALSE.
	* emultempl/pe.em: Likewise.
	* emultempl/pep.em: Likewise.
	* emultempl/xtensaelf.em: Likewise.
---
 opcodes/aarch64-dis.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'opcodes/aarch64-dis.c')

diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index b528af6..e5fe61f 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -2339,7 +2339,7 @@ convert_movewide_to_mov (aarch64_inst *inst)
       int is32 = inst->operands[0].qualifier == AARCH64_OPND_QLF_W;
       value = ~value;
       /* A MOVN has an immediate that could be encoded by MOVZ.  */
-      if (aarch64_wide_constant_p (value, is32, NULL) == TRUE)
+      if (aarch64_wide_constant_p (value, is32, NULL))
 	return 0;
     }
   inst->operands[1].imm.value = value;
@@ -2372,8 +2372,8 @@ convert_movebitmask_to_mov (aarch64_inst *inst)
   /* ORR has an immediate that could be generated by a MOVZ or MOVN
      instruction.  */
   if (inst->operands[0].reg.regno != 0x1f
-      && (aarch64_wide_constant_p (value, is32, NULL) == TRUE
-	  || aarch64_wide_constant_p (~value, is32, NULL) == TRUE))
+      && (aarch64_wide_constant_p (value, is32, NULL)
+	  || aarch64_wide_constant_p (~value, is32, NULL)))
     return 0;
 
   inst->operands[2].type = AARCH64_OPND_NIL;
@@ -2494,7 +2494,7 @@ determine_disassembling_preference (struct aarch64_inst *inst)
   opcode = inst->opcode;
 
   /* This opcode does not have an alias, so use itself.  */
-  if (opcode_has_alias (opcode) == FALSE)
+  if (!opcode_has_alias (opcode))
     return;
 
   alias = aarch64_find_alias_opcode (opcode);
-- 
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