From ee804238f097e91088a340c15891170f2748b4fd Mon Sep 17 00:00:00 2001 From: Jiong Wang Date: Wed, 3 Sep 2014 14:40:41 +0100 Subject: [PATCH/AArch64] Implement LSE feature 2014-09-03 Jiong Wang gas/ * config/tc-aarch64.c (parse_operands): Recognize PAIRREG. (aarch64_features): Add entry for lse extension. include/opcode/ * aarch64.h (AARCH64_FEATURE_LSE): New feature added. (aarch64_opnd): Add AARCH64_OPND_PAIRREG. (aarch64_insn_class): Add lse_atomic. (F_LSE_SZ): New field added. (opcode_has_special_coder): Recognize F_LSE_SZ. opcode/ * aarch64-tbl.h (QL_R4NIL): New qualifiers. (aarch64_feature_lse): New feature added. (LSE): New Added. (aarch64_opcode_table): New LSE instructions added. Improve descriptions for ldarb/ldarh/ldar. (aarch64_opcode_table): Describe PAIRREG. * aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz. * aarch64-opc.c (fields): Add entry for F_LSE_SZ. (aarch64_print_operand): Recognize PAIRREG. (operand_general_constraint_met_p): Check reg pair constraints for CASP instructions. * aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg. (do_special_decoding): Recognize F_LSE_SZ. * aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ. gas/testsuite/ * gas/aarch64/lse-atomic.d: New. * gas/aarch64/lse-atomic.s: Likewise. * gas/aarch64/illegal-lse.d: Likewise. * gas/aarch64/illegal-lse.l: Likewise. * gas/aarch64/illegal-lse.s: Likewise. * gas/aarch64/diagnostic.s: Check processor feature detect for lse instruction. * gas/aarch64/diagnostic.l: Likewise. --- opcodes/aarch64-asm.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'opcodes/aarch64-asm.c') diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index 5b5790f..d28d955 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -856,6 +856,14 @@ do_special_encoding (struct aarch64_inst *inst) if (inst->opcode->flags & F_N) insert_field (FLD_N, &inst->value, value, inst->opcode->mask); } + if (inst->opcode->flags & F_LSE_SZ) + { + idx = select_operand_for_sf_field_coding (inst->opcode); + value = (inst->operands[idx].qualifier == AARCH64_OPND_QLF_X + || inst->operands[idx].qualifier == AARCH64_OPND_QLF_SP) + ? 1 : 0; + insert_field (FLD_lse_sz, &inst->value, value, 0); + } if (inst->opcode->flags & F_SIZEQ) encode_sizeq (inst); if (inst->opcode->flags & F_FPTYPE) -- cgit v1.1