From 3342be5dabeeaf2218dfbf4d38f92214612436f4 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Sat, 23 Sep 2017 18:04:16 -0700 Subject: RISC-V: Only relax to C.LUI when imm != 0 and rd != 0/2 This matches the ISA specification. This also adds two tests: one to make sure the assembler rejects invalid 'c.lui's, and one to make sure we only relax valid 'c.lui's. bfd/ChangeLog 2017-10-24 Andrew Waterman * elfnn-riscv.c (_bfd_riscv_relax_lui): Don't relax to c.lui when rd is x0. include/ChangeLog 2017-10-24 Andrew Waterman * opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the immediate 0. gas/ChangeLog 2017-10-24 Andrew Waterman * testsuite/gas/riscv/c-lui-fail.d: New testcase. gas/testsuite/gas/riscv/c-lui-fail.l: Likewise. gas/testsuite/gas/riscv/c-lui-fail.s: Likewise. gas/testsuite/gas/riscv/riscv.exp: Likewise. ld/ChangeLog 2017-10-24 Andrew Waterman * ld/testsuite/ld-riscv-elf/c-lui.d: New testcase. ld/testsuite/ld-riscv-elf/c-lui.s: Likewise. ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: New test suite. --- ld/ChangeLog | 6 ++++++ ld/testsuite/ld-riscv-elf/c-lui.d | 17 +++++++++++++++++ ld/testsuite/ld-riscv-elf/c-lui.s | 5 +++++ ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 24 ++++++++++++++++++++++++ 4 files changed, 52 insertions(+) create mode 100644 ld/testsuite/ld-riscv-elf/c-lui.d create mode 100644 ld/testsuite/ld-riscv-elf/c-lui.s create mode 100644 ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp (limited to 'ld') diff --git a/ld/ChangeLog b/ld/ChangeLog index 7319d72..f4c4490 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,9 @@ +2017-10-24 Andrew Waterman + + * ld/testsuite/ld-riscv-elf/c-lui.d: New testcase. + ld/testsuite/ld-riscv-elf/c-lui.s: Likewise. + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp: New test suite. + 2017-10-24 Renlin Li PR ld/21703 diff --git a/ld/testsuite/ld-riscv-elf/c-lui.d b/ld/testsuite/ld-riscv-elf/c-lui.d new file mode 100644 index 0000000..7a96711 --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/c-lui.d @@ -0,0 +1,17 @@ +#name: lui to c.lui relaxation +#source: c-lui.s +#as: -march=rv32ic +#ld: -shared -melf32lriscv +#objdump: -d -M no-aliases,numeric + +.*: file format .* + + +Disassembly of section \.text: + +.* <.text>: +.*: 6085 c.lui x1,0x1 +.*: 000000b7 lui x1,0x0 +.*: 00001037 lui x0,0x1 +.*: 00001137 lui x2,0x1 +#pass diff --git a/ld/testsuite/ld-riscv-elf/c-lui.s b/ld/testsuite/ld-riscv-elf/c-lui.s new file mode 100644 index 0000000..4a23fdb --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/c-lui.s @@ -0,0 +1,5 @@ +.text + lui x1, 1 + lui x1, 0 + lui x0, 1 + lui x2, 1 diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp new file mode 100644 index 0000000..efe012e --- /dev/null +++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp @@ -0,0 +1,24 @@ +# Expect script for RISC-V ELF linker tests +# Copyright (C) 2017 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +if [is_target "riscv-*-*"] { + run_dump_test "c-lui" +} -- cgit v1.1