From 176a0d42d0d0a1e4957bb5bf3f5186dc6669a6e7 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Sat, 1 Mar 2008 06:52:52 +0000 Subject: bfd/ * elf64-ppc.c (build_plt_stub): Add relocs on plt call stubs if emitrelocations. (get_relocs): New function, split out from.. (ppc_build_one_stub): ..here. Add relocs on plt_branch stubs if emitrelocations. Remove indx temp. (ppc_size_one_stub): Count new stub relocs. (ppc64_elf_size_stubs): Count new glink reloc. (ppc64_elf_build_stubs): Emit glink reloc if emitrelocations. (ppc64_elf_finish_dynamic_sections): Output glink relocs. * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Describe non-pic glink code. ld/testsuite/ * ld-powerpc/relbrlt.d: Update. Also check .branch_lt section. --- ld/testsuite/ChangeLog | 4 ++++ ld/testsuite/ld-powerpc/relbrlt.d | 18 +++++++++++++++--- 2 files changed, 19 insertions(+), 3 deletions(-) (limited to 'ld') diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 1687ba0..91eb52f 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2008-03-01 Alan Modra + + * ld-powerpc/relbrlt.d: Update. Also check .branch_lt section. + 2008-02-27 Catherine Moore * ld-cris/libdso-10.d: Update expected output for the Dynamic diff --git a/ld/testsuite/ld-powerpc/relbrlt.d b/ld/testsuite/ld-powerpc/relbrlt.d index 172c60f..69321eb 100644 --- a/ld/testsuite/ld-powerpc/relbrlt.d +++ b/ld/testsuite/ld-powerpc/relbrlt.d @@ -1,7 +1,7 @@ #source: relbrlt.s #as: -a64 #ld: -melf64ppc --emit-relocs -#objdump: -dr +#objdump: -Dr .*: file format elf64-powerpc @@ -23,6 +23,7 @@ Disassembly of section \.text: [0-9a-f ]*<.*plt_branch.*>: [0-9a-f ]*: e9 62 80 00 ld r11,-32768\(r2\) +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00d8 [0-9a-f ]*: 7d 69 03 a6 mtctr r11 [0-9a-f ]*: 4e 80 04 20 bctr @@ -32,6 +33,7 @@ Disassembly of section \.text: [0-9a-f ]*<.*plt_branch.*>: [0-9a-f ]*: e9 62 80 08 ld r11,-32760\(r2\) +[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00e0 [0-9a-f ]*: 7d 69 03 a6 mtctr r11 [0-9a-f ]*: 4e 80 04 20 bctr \.\.\. @@ -40,9 +42,19 @@ Disassembly of section \.text: [0-9a-f ]*: 4e 80 00 20 blr \.\.\. -[0-9a-f ]*: +0*13bf00d0 : [0-9a-f ]*: 4e 80 00 20 blr \.\.\. -[0-9a-f ]*: +0*157e00d4 : [0-9a-f ]*: 4e 80 00 20 blr + +Disassembly of section \.branch_lt: + +0*157f00d8 <\.branch_lt>: +[0-9a-f ]*: 00 00 00 00 .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00d0 +[0-9a-f ]*: 13 bf 00 d0 .* +[0-9a-f ]*: 00 00 00 00 .* +[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00d4 +[0-9a-f ]*: 15 7e 00 d4 .* -- cgit v1.1