From b83b4b138298d2a6bfab11f533d7e315c0a1c97b Mon Sep 17 00:00:00 2001 From: Sudakshina Das Date: Wed, 1 May 2019 17:14:01 +0100 Subject: [BINUTILS, AArch64] Enable Transactional Memory Extension This patch enables the new Transactional Memory Extension added recently as part of Arm's new architecture technologies. We introduce a new optional extension "tme" to enable this. The following instructions are part of the extension: * tstart * ttest * tcommit * tcancel # The ISA for the above can be found here: https://developer.arm.com/docs/ddi0602/latest/base-instructions-alphabetic-order *** gas/ChangeLog *** 2019-05-01 Sudakshina Das * config/tc-aarch64.c (parse_operands): Add case for AARCH64_OPND_TME_UIMM16. (aarch64_features): Add "tme". * doc/c-aarch64.texi: Document the same. * testsuite/gas/aarch64/tme-invalid.d: New test. * testsuite/gas/aarch64/tme-invalid.l: New test. * testsuite/gas/aarch64/tme-invalid.s: New test. * testsuite/gas/aarch64/tme.d: New test. * testsuite/gas/aarch64/tme.s: New test. *** include/ChangeLog *** 2019-05-01 Sudakshina Das * opcode/aarch64.h (AARCH64_FEATURE_TME): New. (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16. *** opcodes/ChangeLog *** 2019-05-01 Sudakshina Das * aarch64-asm-2.c: Regenerated. * aarch64-dis-2.c: Regenerated. * aarch64-opc-2.c: Regenerated. * aarch64-opc.c (operand_general_constraint_met_p): Add case for AARCH64_OPND_TME_UIMM16. (aarch64_print_operand): Likewise. * aarch64-tbl.h (QL_IMM_NIL): New. (TME): New. (_TME_INSN): New. (struct aarch64_opcode): Add tstart, tcommit, ttest and tcancel. --- include/ChangeLog | 5 +++++ include/opcode/aarch64.h | 4 +++- 2 files changed, 8 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/ChangeLog b/include/ChangeLog index 1f225b8..1aab82a 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2019-05-01 Sudakshina Das + + * opcode/aarch64.h (AARCH64_FEATURE_TME): New. + (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16. + 2019-04-26 Andrew Bennett Faraz Shahbazker diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 5dc5fb7..c456f67 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -86,7 +86,8 @@ typedef uint32_t aarch64_insn; #define AARCH64_FEATURE_SSBS 0x800000000000ULL /* Memory Tagging Extension. */ #define AARCH64_FEATURE_MEMTAG 0x1000000000000ULL - +/* Transactional Memory Extension. */ +#define AARCH64_FEATURE_TME 0x2000000000000ULL /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8 AARCH64_FEATURE (AARCH64_FEATURE_V8, \ @@ -409,6 +410,7 @@ enum aarch64_opnd AARCH64_OPND_SVE_ZnxN, /* SVE vector register list in Zn. */ AARCH64_OPND_SVE_Zt, /* SVE vector register in Zt. */ AARCH64_OPND_SVE_ZtxN, /* SVE vector register list in Zt. */ + AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */ AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */ }; -- cgit v1.1