From 081ba1b3c08bce14fac7c6c240734f7bd230f784 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 30 Jul 2008 06:29:22 +0000 Subject: include/opcode/ * ppc.h (PPC_OPCODE_405): Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define. gas/ * config/tc-ppc.c (parse_cpu): Separate handling of -m403/405. (md_show_usage): Likewise. opcodes/ * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields. * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands. (insert_sprg, PPC405): Use PPC_OPCODE_405. (powerpc_opcodes): Add Xilinx APU related opcodes. --- include/opcode/ChangeLog | 5 +++++ include/opcode/ppc.h | 8 ++++++++ 2 files changed, 13 insertions(+) (limited to 'include') diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index d217ca4..18aee1f 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2008-07-30 Michael J. Eager + + * ppc.h (PPC_OPCODE_405): Define. + (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define. + 2008-06-13 Peter Bergner * ppc.h (ppc_cpu_t): New typedef. diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 7b789aa..a6b368a 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -154,6 +154,9 @@ extern const int powerpc_num_opcodes; /* Opcode is supported by Power E500MC */ #define PPC_OPCODE_E500MC 0x20000000 +/* Opcode is supported by PowerPC 405 processor. */ +#define PPC_OPCODE_405 0x40000000 + /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) @@ -304,6 +307,11 @@ extern const unsigned int num_powerpc_operands; /* Valid range of operand is 0..n rather than 0..n-1. */ #define PPC_OPERAND_PLUS1 (0x10000) + +/* Xilinx APU and FSL related operands */ +#define PPC_OPERAND_FSL (0x20000) +#define PPC_OPERAND_FCR (0x40000) +#define PPC_OPERAND_UDI (0x80000) /* The POWER and PowerPC assemblers use a few macros. We keep them with the operands table for simplicity. The macro table is an -- cgit v1.1