From 2b848ebdbb2d1f856c7525ed4d6efaf6fe70de81 Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Wed, 14 Sep 2016 13:40:38 +0200 Subject: [ARC] ISA alignment. include/ 2016-09-26 Claudiu Zissulescu * opcode/arc.h (insn_class_t): Add two new classes. opcodes/ 2016-09-26 Claudiu Zissulescu * arc-ext-tbl.h (EXTINSN2OPF): Define. (EXTINSN2OP): Use EXTINSN2OPF. (bspeekm, bspop, modapp): New extension instructions. * arc-opc.c (F_DNZ_ND): Define. (F_DNZ_D): Likewise. (F_SIZEB1): Changed. (C_DNZ_D): Define. (C_HARD): Changed. * arc-tbl.h (dbnz): New instruction. (prealloc): Allow it for ARC EM. (xbfu): Likewise. --- include/opcode/arc.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include/opcode') diff --git a/include/opcode/arc.h b/include/opcode/arc.h index faa63dc..09e973b 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -43,6 +43,7 @@ typedef enum ARITH, AUXREG, BITOP, + BITSTREAM, BMU, BRANCH, CONTROL, @@ -55,7 +56,8 @@ typedef enum LOGICAL, MEMORY, NET, - PMU + PMU, + XY } insn_class_t; /* Instruction Subclass. */ -- cgit v1.1