From 4a3bc79bf4c0e89c876c930a1e95a02213277460 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christoph=20M=C3=BCllner?= Date: Sun, 13 Nov 2022 16:59:20 +0100 Subject: RISC-V: Add T-Head Fmv vendor extension MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch adds the XTheadFmv extension, which allows to access the upper 32 bits of a double-precision floating-point register in RV32. The XTheadFmv extension is documented in the RISC-V toolchain contentions: https://github.com/riscv-non-isa/riscv-toolchain-conventions Co-developed-by: Lifang Xia Signed-off-by: Christoph Müllner --- include/opcode/riscv.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/opcode/riscv.h') diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h index dddabfd..f90cf97 100644 --- a/include/opcode/riscv.h +++ b/include/opcode/riscv.h @@ -416,6 +416,7 @@ enum riscv_insn_class INSN_CLASS_XTHEADCMO, INSN_CLASS_XTHEADCONDMOV, INSN_CLASS_XTHEADFMEMIDX, + INSN_CLASS_XTHEADFMV, INSN_CLASS_XTHEADMAC, INSN_CLASS_XTHEADMEMIDX, INSN_CLASS_XTHEADMEMPAIR, -- cgit v1.1