From abe7c33b45288b407e6d001aad713183d4bab5c6 Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Tue, 15 Nov 2016 15:11:47 +0100 Subject: [ARC] Add checking for LP_COUNT reg usage, improve error reporting. gas/ 2016-11-29 Claudiu Zissulescu * config/tc-arc.c (find_opcode_match): New function argument errmsg. (assemble_tokens): Collect and report the eventual error message found during opcode matching process. * testsuite/gas/arc/lpcount-err.s: New file. * testsuite/gas/arc/add_s-err.s: Update error message. opcode/ 2016-11-29 Claudiu Zissulescu * arc-opc.c (insert_ra_chk): New function. (insert_rb_chk): Likewise. (insert_rad): Update text error message. (insert_rcd): Likewise. (insert_rhv2): Likewise. (insert_r0): Likewise. (insert_r1): Likewise. (insert_r2): Likewise. (insert_r3): Likewise. (insert_sp): Likewise. (insert_gp): Likewise. (insert_pcl): Likewise. (insert_blink): Likewise. (insert_ilink1): Likewise. (insert_ilink2): Likewise. (insert_ras): Likewise. (insert_rbs): Likewise. (insert_rcs): Likewise. (insert_simm3s): Likewise. (insert_rrange): Likewise. (insert_fpel): Likewise. (insert_blinkel): Likewise. (insert_pcel): Likewise. (insert_nps_3bit_dst): Likewise. (insert_nps_3bit_dst_short): Likewise. (insert_nps_3bit_src2_short): Likewise. (insert_nps_bitop_size_2b): Likewise. (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Likewise. (RA_CHK): Define. (RB): Adjust. (RB_CHK): Define. (RC): Adjust. * arc-dis.c (print_insn_arc): Add LOAD and STORE class. * arc-tbl.h (div, divu): All instructions are DIVREM class. Change first insn argument to check for LP_COUNT usage. (rem): Likewise. (ld, ldd): All instructions are LOAD class. Change first insn argument to check for LP_COUNT usage. (st, std): All instructions are STORE class. (mac, mpy, dmac, mul, dmpy): All instructions are MPY class. Change first insn argument to check for LP_COUNT usage. (mov): All instructions are MOVE class. Change first insn argument to check for LP_COUNT usage. include/ 2016-11-29 Claudiu Zissulescu * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE instruction classes. --- include/opcode/arc.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/opcode/arc.h') diff --git a/include/opcode/arc.h b/include/opcode/arc.h index 2214b2f..b3b76d9 100644 --- a/include/opcode/arc.h +++ b/include/opcode/arc.h @@ -47,17 +47,22 @@ typedef enum BMU, BRANCH, CONTROL, + DIVREM, DPI, DSP, FLOAT, INVALID, JUMP, KERNEL, + LOAD, LOGICAL, MEMORY, + MOVE, + MPY, NET, PROTOCOL_DECODE, PMU, + STORE, XY } insn_class_t; -- cgit v1.1