From 9cea966c22d3db4ed4d7008241103b05105c17d3 Mon Sep 17 00:00:00 2001 From: DJ Delorie Date: Fri, 23 Dec 2011 01:49:37 +0000 Subject: [bfd] * elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX. (rl78_reloc_map): Add BFD_RELOC_RL78_RELAX. (rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR, and R_RL78_RH_SADDR. (rl78_elf_finish_dynamic_sections): Only validate PLT section if we didn't relax anything, as relaxing might remove a PLT reference after we've set up the table. (elf32_rl78_relax_delete_bytes): New. (reloc_bubblesort): New. (rl78_offset_for_reloc): New. (relax_addr16): New. (rl78_elf_relax_section): Add support for relaxing long instructions into short ones. [gas] * config/rl78-defs.h (rl78_linkrelax_addr16): Add. (rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove. * config/rl78-parse.y: Tag all addr16 and branch patterns with relaxation markers. * config/tc-rl78.c (rl78_linkrelax_addr16): New. (rl78_linkrelax_branch): New. (OPTION_RELAX): New. (md_longopts): Add relax option. (md_parse_option): Add OPTION_RELAX. (rl78_frag_init): Support relaxation. (rl78_handle_align): New. (md_assemble): Support relaxation. (md_apply_fix): Likewise. (md_convert_frag): Likewise. * config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New. (HANDLE_ALIGN): New. (rl78_handle_align): Declare. * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit insn patterns. (find_bit_index): New. Strip .BIT suffix off relevent expressions for bit insns. (rl78_lex): Exclude bit suffixes from expression parsing. [include/elf] * rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New. (RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New. --- include/elf/rl78.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'include/elf/rl78.h') diff --git a/include/elf/rl78.h b/include/elf/rl78.h index 4f29850..82959e1 100644 --- a/include/elf/rl78.h +++ b/include/elf/rl78.h @@ -55,6 +55,11 @@ START_RELOC_NUMBERS (elf_rl78_reloc_type) RELOC_NUMBER (R_RL78_DIR16_REV, 0x11) RELOC_NUMBER (R_RL78_DIR3U_PCREL, 0x12) + /* These are extensions added by Red Hat. */ + RELOC_NUMBER (R_RL78_RH_RELAX, 0x2d) /* Marks opcodes suitable for linker relaxation. */ + RELOC_NUMBER (R_RL78_RH_SFR, 0x2e) /* SFR addresses - internal use only. */ + RELOC_NUMBER (R_RL78_RH_SADDR, 0x2f) /* SADDR addresses - internal use only.. */ + /* These are for complex relocs. */ RELOC_NUMBER (R_RL78_ABS32, 0x41) RELOC_NUMBER (R_RL78_ABS24S, 0x42) @@ -103,12 +108,8 @@ END_RELOC_NUMBERS (R_RL78_max) #define E_FLAG_RL78_DSP (1 << 1) /* Defined in the RL78 CPU Object file specification, but not explained. */ /* These define the addend field of R_RL78_RH_RELAX relocations. */ -#define RL78_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6. */ -#define RL78_RELAXA_IMM12 0x00000020 /* Imm8/16/24/32 at bit offset 12. */ -#define RL78_RELAXA_DSP4 0x00000040 /* Dsp0/8/16 at bit offset 4. */ -#define RL78_RELAXA_DSP6 0x00000080 /* Dsp0/8/16 at bit offset 6. */ -#define RL78_RELAXA_DSP14 0x00000100 /* Dsp0/8/16 at bit offset 14. */ -#define RL78_RELAXA_BRA 0x00000200 /* Any type of branch (must be decoded). */ +#define RL78_RELAXA_BRA 0x00000010 /* Any type of branch (must be decoded). */ +#define RL78_RELAXA_ADDR16 0x00000020 /* addr16->sfr/saddr opportunity */ #define RL78_RELAXA_RNUM 0x0000000f /* Number of associated relocations. */ /* These mark the place where alignment is requested, and the place where the filler bytes end. */ #define RL78_RELAXA_ALIGN 0x10000000 /* Start alignment; the remaining bits are the alignment value. */ -- cgit v1.1