From 41cee0897b670168e0d6f455c9bc45c73f8023df Mon Sep 17 00:00:00 2001 From: Faraz Shahbazker Date: Sun, 28 Apr 2019 18:21:00 -0700 Subject: Add load-link, store-conditional paired EVA instructions Add paired load-link and store-conditional instructions to the EVA ASE for MIPS32R6[1]. These instructions are optional within the EVA ASE. Their presence is indicated by the XNP bit in the Config5 register. [1] "MIPS Architecture for Programmers Volume II-A: The MIPS32 Instruction Set Manual", Imagination Technologies Ltd., Document Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 230-231, pp. 357-360. gas/ * config/tc-mips.c (mips_set_ase): Handle ASE_EVA_R6. (macro) : New cases. (mips_after_parse_args): Translate EVA to EVA_R6. * testsuite/gas/mips/ase-errors-1.s: Add new instructions. * testsuite/gas/mips/eva.s: Likewise. * testsuite/gas/mips/ase-errors-1.l: Check errors for new instructions. * testsuite/gas/mips/mipsr6@eva.d: Check new test cases. include/ * opcode/mips.h (ASE_EVA_R6): New macro. (M_LLWPE_AB, M_SCWPE_AB): New enum values. opcodes/ * mips-dis.c (mips_calculate_combination_ases): Add ISA argument and set ASE_EVA_R6 appropriately. (set_default_mips_dis_options): Pass ISA to above. (parse_mips_dis_option): Likewise. * mips-opc.c (EVAR6): New macro. (mips_builtin_opcodes): Add llwpe, scwpe. Derived from patch authored by Andrew Bennett --- include/ChangeLog | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/ChangeLog') diff --git a/include/ChangeLog b/include/ChangeLog index 1aab82a..cab6418 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,9 @@ +2019-05-06 Andrew Bennett + Faraz Shahbazker + + * opcode/mips.h (ASE_EVA_R6): New macro. + (M_LLWPE_AB, M_SCWPE_AB): New enum values. + 2019-05-01 Sudakshina Das * opcode/aarch64.h (AARCH64_FEATURE_TME): New. -- cgit v1.1