From 40fc1451c63d21a1448bb21e39a7b70ecb959213 Mon Sep 17 00:00:00 2001 From: Simon Dardis Date: Wed, 12 Aug 2015 17:06:35 +0100 Subject: [MIPS] Map 'move' to 'or'. The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This change affects microMIPS, MIPS32, MIPS64. 2015-08-12 Simon Dardis opcodes/ * micromips-opc.c (micromips_opcodes): Re-order table so that move based on 'or' is first. * mips-opc.c (mips_builtin_opcodes): Ditto. bfd/ * elfxx-mips.c (STUB_MOVE): Change to use 'or' only. (mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry, mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry): Update to use 'or' instead of 'addu/daddu'. (_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE. (move_insns_32): Reorder table. gas/ * config/tc-mips.c (move_register): Change to use 'or' only. (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to use or for move. gas/testsuite/ * gas/mips/elf-rel23.d: Update test. * gas/mips/elf-rel23.d: Ditto. * gas/mips/elf-rel23a.d: Ditto. * gas/mips/elf-rel23b.d: Ditto. * gas/mips/elf_e_flags1.d: Ditto. * gas/mips/elf_e_flags2.d: Ditto. * gas/mips/elf_e_flags3.d: Ditto. * gas/mips/elf_e_flags4.d: Ditto. * gas/mips/loc-swap-dis.d: Ditto. * gas/mips/micromips-insn32.d: Ditto. * gas/mips/micromips-noinsn32.d: Ditto. * gas/mips/micromips-trap.d: Ditto. * gas/mips/micromips.d: Ditto. * gas/mips/mips-abi32-pic.d: Ditto. * gas/mips/mips-abi32.d: Ditto. * gas/mips/mips-gp32-fp32-pic.d: Ditto. * gas/mips/mips-gp32-fp32.d: Ditto. * gas/mips/mips-gp32-fp64-pic.d: Ditto. * gas/mips/mips-gp32-fp64.d: Ditto. * gas/mips/mips-gp64-fp32-pic.d: Ditto. * gas/mips/mips-gp64-fp32.d: Ditto. * gas/mips/mips-gp64-fp64-pic.d: Ditto. * gas/mips/mips-gp64-fp64.d: Ditto. * gas/mips/mipsr6@loc-swap-dis.d: Ditto. * gas/mips/tls-o32.d: Ditto. * gas/mips/uld2-eb.d: Ditto. * gas/mips/uld2-el.d: Ditto. * gas/mips/ulw2-eb-ilocks.d: Ditto. * gas/mips/ulw2-eb.d: Ditto. * gas/mips/ulw2-el-ilocks.d: Ditto. * gas/mips/ulw2-el.d: Ditto. * gas/mips/move.d: New test. * gas/mips/move.s: Ditto. * gas/mips/micromips32-move.d: Ditto. * gas/mips/micromips32-move.s: Ditto. * gas/mips/mips.exp: Run the new tests. gold/ * mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64, lazy_stub_normal_1, lazy_stub_normal_1_n64, lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big, lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64, lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big, lazy_stub_micromips32_big_n64): Update to use 'or' for move instead of 'addu/daddu'. ld/testsuite/ * ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test. * ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-se.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto. * ld-mips-elf/jalx-2.dd: Ditto. * ld-mips-elf/mips16-pic-3.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3a.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-5b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto. * ld-mips-elf/stub-dynsym-1-10000.d: Ditto. * ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto. * ld-mips-elf/stub-dynsym-1-7fff.d: Ditto. * ld-mips-elf/stub-dynsym-1-8000.d: Ditto. * ld-mips-elf/stub-dynsym-1-fff0.d: Ditto. * ld-mips-elf/tlsbin-o32.d: Ditto. * ld-mips-elf/tlsdyn-o32-1.d: Ditto. * ld-mips-elf/tlsdyn-o32-2.d: Ditto. * ld-mips-elf/tlsdyn-o32-3.d: Ditto. * ld-mips-elf/tlsdyn-o32.d: Ditto. * ld-mips-elf/tlslib-o32.d: Ditto. --- gold/mips.cc | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'gold/mips.cc') diff --git a/gold/mips.cc b/gold/mips.cc index acf76cf..01cf33f 100644 --- a/gold/mips.cc +++ b/gold/mips.cc @@ -6162,7 +6162,7 @@ const uint32_t Mips_output_data_plt::plt0_entry_o32[] = 0x8f990000, // lw $25, %lo(&GOTPLT[0])($28) 0x279c0000, // addiu $28, $28, %lo(&GOTPLT[0]) 0x031cc023, // subu $24, $24, $28 - 0x03e07821, // move $15, $31 # 32-bit move (addu) + 0x03e07825, // or $15, $31, zero 0x0018c082, // srl $24, $24, 2 0x0320f809, // jalr $25 0x2718fffe // subu $24, $24, 2 @@ -6177,7 +6177,7 @@ const uint32_t Mips_output_data_plt::plt0_entry_n32[] = 0x8dd90000, // lw $25, %lo(&GOTPLT[0])($14) 0x25ce0000, // addiu $14, $14, %lo(&GOTPLT[0]) 0x030ec023, // subu $24, $24, $14 - 0x03e07821, // move $15, $31 # 32-bit move (addu) + 0x03e07825, // or $15, $31, zero 0x0018c082, // srl $24, $24, 2 0x0320f809, // jalr $25 0x2718fffe // subu $24, $24, 2 @@ -6192,7 +6192,7 @@ const uint32_t Mips_output_data_plt::plt0_entry_n64[] = 0xddd90000, // ld $25, %lo(&GOTPLT[0])($14) 0x25ce0000, // addiu $14, $14, %lo(&GOTPLT[0]) 0x030ec023, // subu $24, $24, $14 - 0x03e07821, // move $15, $31 # 64-bit move (daddu) + 0x03e07825, // or $15, $31, zero 0x0018c0c2, // srl $24, $24, 3 0x0320f809, // jalr $25 0x2718fffe // subu $24, $24, 2 @@ -6229,7 +6229,7 @@ plt0_entry_micromips32_o32[] = 0xff3c, 0x0000, // lw $25, %lo(&GOTPLT[0])($28) 0x339c, 0x0000, // addiu $28, $28, %lo(&GOTPLT[0]) 0x0398, 0xc1d0, // subu $24, $24, $28 - 0x001f, 0x7950, // move $15, $31 + 0x001f, 0x7a90, // or $15, $31, zero 0x0318, 0x1040, // srl $24, $24, 2 0x03f9, 0x0f3c, // jalr $25 0x3318, 0xfffe // subu $24, $24, 2 @@ -6631,7 +6631,7 @@ const uint32_t Mips_output_data_mips_stubs::lazy_stub_normal_1[4] = { 0x8f998010, // lw t9,0x8010(gp) - 0x03e07821, // addu t7,ra,zero + 0x03e07825, // or t7,ra,zero 0x0320f809, // jalr t9,ra 0x24180000 // addiu t8,zero,DYN_INDEX sign extended }; @@ -6643,7 +6643,7 @@ const uint32_t Mips_output_data_mips_stubs::lazy_stub_normal_1_n64[4] = { 0xdf998010, // ld t9,0x8010(gp) - 0x03e0782d, // daddu t7,ra,zero + 0x03e07825, // or t7,ra,zero 0x0320f809, // jalr t9,ra 0x64180000 // daddiu t8,zero,DYN_INDEX sign extended }; @@ -6655,7 +6655,7 @@ const uint32_t Mips_output_data_mips_stubs::lazy_stub_normal_2[4] = { 0x8f998010, // lw t9,0x8010(gp) - 0x03e07821, // addu t7,ra,zero + 0x03e07825, // or t7,ra,zero 0x0320f809, // jalr t9,ra 0x34180000 // ori t8,zero,DYN_INDEX unsigned }; @@ -6667,7 +6667,7 @@ const uint32_t Mips_output_data_mips_stubs::lazy_stub_normal_2_n64[4] = { 0xdf998010, // ld t9,0x8010(gp) - 0x03e0782d, // daddu t7,ra,zero + 0x03e07825, // or t7,ra,zero 0x0320f809, // jalr t9,ra 0x34180000 // ori t8,zero,DYN_INDEX unsigned }; @@ -6678,7 +6678,7 @@ template const uint32_t Mips_output_data_mips_stubs::lazy_stub_big[5] = { 0x8f998010, // lw t9,0x8010(gp) - 0x03e07821, // addu t7,ra,zero + 0x03e07825, // or t7,ra,zero 0x3c180000, // lui t8,DYN_INDEX 0x0320f809, // jalr t9,ra 0x37180000 // ori t8,t8,DYN_INDEX @@ -6691,7 +6691,7 @@ const uint32_t Mips_output_data_mips_stubs::lazy_stub_big_n64[5] = { 0xdf998010, // ld t9,0x8010(gp) - 0x03e0782d, // daddu t7,ra,zero + 0x03e07825, // or t7,ra,zero 0x3c180000, // lui t8,DYN_INDEX 0x0320f809, // jalr t9,ra 0x37180000 // ori t8,t8,DYN_INDEX @@ -6788,7 +6788,7 @@ Mips_output_data_mips_stubs:: lazy_stub_micromips32_normal_1[] = { 0xff3c, 0x8010, // lw t9,0x8010(gp) - 0x001f, 0x7950, // addu t7,ra,zero + 0x001f, 0x7a90, // or t7,ra,zero 0x03f9, 0x0f3c, // jalr ra,t9 0x3300, 0x0000 // addiu t8,zero,DYN_INDEX sign extended }; @@ -6802,7 +6802,7 @@ Mips_output_data_mips_stubs:: lazy_stub_micromips32_normal_1_n64[] = { 0xdf3c, 0x8010, // ld t9,0x8010(gp) - 0x581f, 0x7950, // daddu t7,ra,zero + 0x001f, 0x7a90, // or t7,ra,zero 0x03f9, 0x0f3c, // jalr ra,t9 0x5f00, 0x0000 // daddiu t8,zero,DYN_INDEX sign extended }; @@ -6816,7 +6816,7 @@ Mips_output_data_mips_stubs:: lazy_stub_micromips32_normal_2[] = { 0xff3c, 0x8010, // lw t9,0x8010(gp) - 0x001f, 0x7950, // addu t7,ra,zero + 0x001f, 0x7a90, // or t7,ra,zero 0x03f9, 0x0f3c, // jalr ra,t9 0x5300, 0x0000 // ori t8,zero,DYN_INDEX unsigned }; @@ -6830,7 +6830,7 @@ Mips_output_data_mips_stubs:: lazy_stub_micromips32_normal_2_n64[] = { 0xdf3c, 0x8010, // ld t9,0x8010(gp) - 0x581f, 0x7950, // daddu t7,ra,zero + 0x001f, 0x7a90, // or t7,ra,zero 0x03f9, 0x0f3c, // jalr ra,t9 0x5300, 0x0000 // ori t8,zero,DYN_INDEX unsigned }; @@ -6842,7 +6842,7 @@ const uint32_t Mips_output_data_mips_stubs::lazy_stub_micromips32_big[] = { 0xff3c, 0x8010, // lw t9,0x8010(gp) - 0x001f, 0x7950, // addu t7,ra,zero + 0x001f, 0x7a90, // or t7,ra,zero 0x41b8, 0x0000, // lui t8,DYN_INDEX 0x03f9, 0x0f3c, // jalr ra,t9 0x5318, 0x0000 // ori t8,t8,DYN_INDEX @@ -6855,7 +6855,7 @@ const uint32_t Mips_output_data_mips_stubs::lazy_stub_micromips32_big_n64[] = { 0xdf3c, 0x8010, // ld t9,0x8010(gp) - 0x581f, 0x7950, // daddu t7,ra,zero + 0x001f, 0x7a90, // or t7,ra,zero 0x41b8, 0x0000, // lui t8,DYN_INDEX 0x03f9, 0x0f3c, // jalr ra,t9 0x5318, 0x0000 // ori t8,t8,DYN_INDEX -- cgit v1.1