From 45830439cef3c827ae5ddb3915a1edcf1206dc77 Mon Sep 17 00:00:00 2001 From: Carl Love Date: Fri, 4 Nov 2022 12:14:01 -0400 Subject: PowerPC update comments for the MMA instruction name changes. The mnemonics for the pmxvf16ger*, pmxvf32ger*,pmxvf64ger*, pmxvi4ger8*, pmxvi8ger4*, and pmxvi16ger2* instructions were officially changed to pmdmxbf16ger*, pmdmxvf32ger*, pmdmxvf64ger*, pmdmxvi4ger8*, pmdmxvi8ger4*, pmdmxvi16ger* respectively. The old mnemonics are still supported by the assembler as extended mnemonics. The disassembler generates the new mnemonics. The name changes occurred in commit: commit bb98553cad4e017f1851153fa5de91f2cee98fb2 Author: Peter Bergner Date: Sat Oct 8 16:19:51 2022 -0500 PowerPC: Add support for RFC02658 - MMA+ Outer-Product Instructions gas/ * config/tc-ppc.c (md_assemble): Only check for prefix opcodes. * testsuite/gas/ppc/rfc02658.s: New test. * testsuite/gas/ppc/rfc02658.d: Likewise. * testsuite/gas/ppc/ppc.exp: Run it. opcodes/ * ppc-opc.c (XMSK8, P_GERX4_MASK, P_GERX2_MASK, XX3GERX_MASK): New. (powerpc_opcodes): Add dmxvi8gerx4pp, dmxvi8gerx4, dmxvf16gerx2pp, dmxvf16gerx2, dmxvbf16gerx2pp, dmxvf16gerx2np, dmxvbf16gerx2, dmxvi8gerx4spp, dmxvbf16gerx2np, dmxvf16gerx2pn, dmxvbf16gerx2pn, dmxvf16gerx2nn, dmxvbf16gerx2nn, pmdmxvi8gerx4pp, pmdmxvi8gerx4, pmdmxvf16gerx2pp, pmdmxvf16gerx2, pmdmxvbf16gerx2pp, pmdmxvf16gerx2np, pmdmxvbf16gerx2, pmdmxvi8gerx4spp, pmdmxvbf16gerx2np, pmdmxvf16gerx2pn, pmdmxvbf16gerx2pn, pmdmxvf16gerx2nn, pmdmxvbf16gerx2nn. This patch updates the comments in the various gdb files to reflect the name changes. There are no functional changes made by this patch. The older instruction names are still used in the test gdb.reverse/ppc_record_test_isa_3_1.exp for backwards compatibility. Patch has been tested on Power 10 with no regressions. --- gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c | 8 ++++++++ gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.exp | 5 +++++ 2 files changed, 13 insertions(+) (limited to 'gdb/testsuite') diff --git a/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c b/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c index c0d65d9..e44645e 100644 --- a/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c +++ b/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.c @@ -22,6 +22,13 @@ static unsigned long ra, rb, rs; int main () { + + /* This test is used to verify the recording of the MMA instructions. The + names of the MMA instructions pmxbf16ger*, pmxvf32ger*,pmxvf64ger*, + pmxvi4ger8*, pmxvi8ger4* pmxvi16ger2* instructions were officially changed + to pmdmxbf16ger*, pmdmxvf32ger*, pmdmxvf64ger*, pmdmxvi4ger8*, + pmdmxvi8ger4*, pmdmxvi16ger* respectively. The old mnemonics are used in + this test for backward compatibity. */ ra = 0xABCDEF012; rb = 0; rs = 0x012345678; @@ -87,6 +94,7 @@ main () "wa" (vec_xb) ); __asm__ __volatile__ ("xvf16ger2pn 5, %x0, %x1" :: "wa" (vec_xa),\ "wa" (vec_xb) ); + /* Use the older instruction name for backward compatibility */ __asm__ __volatile__ ("pmxvi8ger4spp 6, %x0, %x1, 11, 13, 5" :: "wa" (vec_xa), "wa" (vec_xb) ); __asm__ __volatile__ ("pmxvf32gerpp 7, %x0, %x1, 11, 13" diff --git a/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.exp b/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.exp index 8cecb06..79f04f6 100644 --- a/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.exp +++ b/gdb/testsuite/gdb.reverse/ppc_record_test_isa_3_1.exp @@ -124,6 +124,11 @@ gdb_test_no_output "record" "start recording test2" ## pmxvi8ger4 - ACC[6], vs[21] to vs[27] ## pmxvf32gerpp - ACC[7], vs[28] to vs[31] and fpscr +## Note the names for pmxvi8ger4 and pmxvf32gerpp have been officially +## changed to pmdmxvi8ger4 and pmdmxvf32gerpp respectively. The older +## names are still supported by the assembler as extended mnemonics. The +## older names are used in this test for backward compatibility. + set stop3 [gdb_get_line_number "stop 3"] set stop4 [gdb_get_line_number "stop 4"] -- cgit v1.1