From 1777feb0fea5ec350a86eecf81f71ccc60d4cf6f Mon Sep 17 00:00:00 2001 From: Michael Snyder Date: Sun, 9 Jan 2011 03:08:57 +0000 Subject: 2011-01-08 Michael Snyder * h8300-tdep.c: Comment cleanup, mostly periods and spaces. * hppa-hpux-tdep.c: Ditto. * hppa-linux-nat.c: Ditto. * hppa-linux-tdep.c: Ditto. * hppanbsd-tdep.c: Ditto. * hppa-tdep.c: Ditto. * hppa-tdep.h: Ditto. * hpux-thread.c: Ditto. * i386-cygwin-tdep.c: Ditto. * i386-darwin-nat.c: Ditto. * i386gnu-nat.c: Ditto. * i386-linux-nat.c: Ditto. * i386-linux-tdep.c: Ditto. * i386-nat.c: Ditto. * i386-nat.h: Ditto. * i386nbsd-tdep.c: Ditto. * i386-sol2-nat.c: Ditto. * i386-stub.c: Ditto. * i386-tdep.c: Ditto. * i386-tdep.h: Ditto. * i387-tdep.c: Ditto. * ia64-linux-nat.c: Ditto. * ia64-linux-tdep.c: Ditto. * ia64-tdep.c: Ditto. * infcall.c: Ditto. * infcall.h: Ditto. * infcmd.c: Ditto. * inferior.c: Ditto. * inferior.h: Ditto. * infloop.c: Ditto. * inflow.c: Ditto. * infrun.c: Ditto. * interps.c: Ditto. * interps.h: Ditto. * iq2000-tdep.c: Ditto. * irix5-nat.c: Ditto. * jit.c: Ditto. * jit.h: Ditto. * jv-exp.y: Ditto. * jv-lang.c: Ditto. * jv-lang.h: Ditto. * jv-typeprint.c: Ditto. * jv-valprint.c: Ditto. * language.c: Ditto. * language.h: Ditto. * linespec.c: Ditto. * linux-fork.c: Ditto. * linux-nat.c: Ditto. * linux-thread-db.c: Ditto. * lm32-tdep.c: Ditto. --- gdb/lm32-tdep.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) (limited to 'gdb/lm32-tdep.c') diff --git a/gdb/lm32-tdep.c b/gdb/lm32-tdep.c index b805716..327ac32 100644 --- a/gdb/lm32-tdep.c +++ b/gdb/lm32-tdep.c @@ -48,7 +48,7 @@ struct gdbarch_tdep { - /* gdbarch target dependent data here. Currently unused for LM32. */ + /* gdbarch target dependent data here. Currently unused for LM32. */ }; struct lm32_frame_cache @@ -144,7 +144,7 @@ lm32_analyze_prologue (struct gdbarch *gdbarch, if ((LM32_OPCODE (instruction) == OP_SW) && (LM32_REG0 (instruction) == SIM_LM32_SP_REGNUM)) { - /* Any stack displaced store is likely part of the prologue. + /* Any stack displaced store is likely part of the prologue. Record that the register is being saved, and the offset into the stack. */ info->saved_regs[LM32_REG1 (instruction)].addr = @@ -153,7 +153,7 @@ lm32_analyze_prologue (struct gdbarch *gdbarch, else if ((LM32_OPCODE (instruction) == OP_ADDI) && (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM)) { - /* An add to the SP is likely to be part of the prologue. + /* An add to the SP is likely to be part of the prologue. Adjust stack size by whatever the instruction adds to the sp. */ info->size -= LM32_IMM16 (instruction); } @@ -172,7 +172,8 @@ lm32_analyze_prologue (struct gdbarch *gdbarch, } else { - /* Any other instruction is likely not to be part of the prologue. */ + /* Any other instruction is likely not to be part of the + prologue. */ break; } } @@ -336,8 +337,8 @@ lm32_extract_return_value (struct type *type, struct regcache *regcache, } else { - /* Aggregate types greater than a single register are returned in memory. - FIXME: Unless they are only 2 regs?. */ + /* Aggregate types greater than a single register are returned + in memory. FIXME: Unless they are only 2 regs?. */ regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l); return_buffer = l; read_memory (return_buffer, valbuf, TYPE_LENGTH (type)); @@ -463,7 +464,8 @@ lm32_frame_cache (struct frame_info *this_frame, void **this_prologue_cache) converted into a request for the RA register. */ info->saved_regs[SIM_LM32_PC_REGNUM] = info->saved_regs[SIM_LM32_RA_REGNUM]; - /* The previous frame's SP needed to be computed. Save the computed value. */ + /* The previous frame's SP needed to be computed. Save the computed + value. */ trad_frame_set_value (info->saved_regs, SIM_LM32_SP_REGNUM, prev_sp); return info; -- cgit v1.1