From f1771dcebf80c75a13ca456491ddfb9b43fcaddf Mon Sep 17 00:00:00 2001 From: Yao Qi Date: Fri, 4 Mar 2016 16:02:15 +0000 Subject: ARM process record: VMOV ARM process record gets the wrong register number for VMOV (from core register to single-precision register). That is, we should record the D register rather than the S pseudo register. The patch also removes the condition "bit (arm_insn_r->arm_insn, 20)" check, which has been checked above. It fixes the following internal error, (gdb) PASS: gdb.reverse/finish-precsave.exp: BP at end of main continue^M Continuing.^M ../../binutils-gdb/gdb/regcache.c:649: internal-error: regcache_raw_read: Assertion `regnum >= 0 && regnum < regcache->descr->nr_raw_registers' failed.^M A problem internal to GDB has been detected,FAIL: gdb.reverse/finish-precsave.exp: run to end of main (GDB internal error) gdb: 2016-03-04 Yao Qi * arm-tdep.c (arm_record_vdata_transfer_insn): Simplify the condition check. Record the right D register number. --- gdb/arm-tdep.c | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) (limited to 'gdb/arm-tdep.c') diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 605f09b..54a21ef 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -10800,12 +10800,7 @@ arm_record_vdata_transfer_insn (insn_decode_record *arm_insn_r) /* Handle VMOV instruction. */ if (bits_a == 0x00) { - if (bit (arm_insn_r->arm_insn, 20)) - record_buf[0] = reg_t; - else - record_buf[0] = num_regs + (bit (arm_insn_r->arm_insn, 7) | - (reg_v << 1)); - + record_buf[0] = reg_t; arm_insn_r->reg_rec_count = 1; } /* Handle VMRS instruction. */ @@ -10823,11 +10818,7 @@ arm_record_vdata_transfer_insn (insn_decode_record *arm_insn_r) /* Handle VMOV instruction. */ if (bits_a == 0x00) { - if (bit (arm_insn_r->arm_insn, 20)) - record_buf[0] = reg_t; - else - record_buf[0] = num_regs + (bit (arm_insn_r->arm_insn, 7) | - (reg_v << 1)); + record_buf[0] = ARM_D0_REGNUM + reg_v; arm_insn_r->reg_rec_count = 1; } -- cgit v1.1