From 8d689ee570e7c4c61231b919d5b6a34c20414c43 Mon Sep 17 00:00:00 2001 From: Yao Qi Date: Thu, 15 Oct 2015 15:05:10 +0100 Subject: aarch64 multi-arch part 6: HW breakpoint on unaligned address Nowadays, both aarch64 GDB and linux kernel assumes that address for setting breakpoint should be 4-byte aligned. However that is not true after we support multi-arch, because thumb instruction can be at 2-byte aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html to linux kernel is to teach kernel to handle 2-byte aligned address for HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte aligned address. First of all, we call gdbarch_breakpoint_from_pc to get the instruction length rather than using hard-coded 4. Secondly, in GDBserver, we set length back to 2 if it is 3, because GDB encode 3 in it to indicate it is a 32-bit thumb breakpoint. Then we relax the address alignment check from 4-byte aligned to 2-byte aligned. This patch enables some tests (such as gdb.base/break-idempotent.exp, gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and fixes many fails (such as gdb.base/hbreak2.exp) when the program is compiled in thumb mode on aarch64. Regression tested on aarch64-linux, both native and gdbserver. This is the last patch of multi-arch work. gdb: 2015-10-15 Yao Qi * aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint): Call gdbarch_breakpoint_from_pc to instruction length. (aarch64_linux_remove_hw_breakpoint): Likewise. * common/common-regcache.h (regcache_register_size): Declare. * nat/aarch64-linux-hw-point.c: Include "common-regcache.h". (aarch64_point_is_aligned): Set alignment to 2 for breakpoint if the process is 32bit, otherwise set alignment to 4. (aarch64_handle_breakpoint): Update comments. * regcache.c (regcache_register_size): New function. gdb/gdbserver: 2015-10-15 Yao Qi * linux-aarch64-low.c (aarch64_insert_point): Set len to 2 if it is 3. (aarch64_remove_point): Likewise. * regcache.c (regcache_register_size): New function. --- gdb/aarch64-linux-nat.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'gdb/aarch64-linux-nat.c') diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index c9f439f..4d3d55a 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -608,11 +608,13 @@ aarch64_linux_insert_hw_breakpoint (struct target_ops *self, { int ret; CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address; - const int len = 4; + int len; const enum target_hw_bp_type type = hw_execute; struct aarch64_debug_reg_state *state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); + gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); + if (show_debug_regs) fprintf_unfiltered (gdb_stdlog, @@ -640,11 +642,13 @@ aarch64_linux_remove_hw_breakpoint (struct target_ops *self, { int ret; CORE_ADDR addr = bp_tgt->placed_address; - const int len = 4; + int len = 4; const enum target_hw_bp_type type = hw_execute; struct aarch64_debug_reg_state *state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); + gdbarch_breakpoint_from_pc (gdbarch, &addr, &len); + if (show_debug_regs) fprintf_unfiltered (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n", -- cgit v1.1