From ef273377587d440f4aa248265147d5e75f86a018 Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Fri, 1 Apr 2022 10:22:28 +0100 Subject: gdb/arm: Extend arm_m_addr_is_magic to support FNC_RETURN, add unwind-secure-frames command MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch makes use of the support for several stack pointers introduced by the previous patch to switch between them as needed during unwinding. It introduces a new 'unwind-secure-frames' arm command to enable/disable mode switching during unwinding. It is enabled by default. It has been tested using an STM32L5 board (with cortex-m33) and the sample applications shipped with the STM32Cube development environment: GTZC_TZSC_MPCBB_TrustZone in STM32CubeL5/Projects/NUCLEO-L552ZE-Q/Examples/GTZC. The test consisted in setting breakpoints in various places and check that the backtrace is correct: SecureFault_Callback (Non-secure mode), __gnu_cmse_nonsecure_call (before and after the vpush instruction), SecureFault_Handler (Secure mode). This implies that we tested only some parts of this patch (only MSP* were used), but remaining parts seem reasonable. Signed-off-by: Torbjörn Svensson Signed-off-by: Christophe Lyon Signed-off-by: Christophe Lyon --- gdb/NEWS | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'gdb/NEWS') diff --git a/gdb/NEWS b/gdb/NEWS index 760cb2b..982f4a1 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -5214,6 +5214,11 @@ show arm force-mode the current CPSR value for instructions without symbols; previous versions of GDB behaved as if "set arm fallback-mode arm". +set arm unwind-secure-frames + Enable unwinding from Non-secure to Secure mode on Cortex-M with + Security extension. + This can trigger security exceptions when unwinding exception stacks. + set disable-randomization show disable-randomization Standalone programs run with the virtual address space randomization enabled -- cgit v1.1