From ec6b11e7ec394d25dd50addcbdaeca46a4a1eda6 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Mon, 11 Mar 2024 08:23:11 +0100 Subject: x86/APX: permit wider than 4-bit immediates with V{EXTRACT,INSERT}{F,I}128 These aren't useful, but can be encoded for their AVX forms and hence should also be permitted for the APX surrogates. Extend the respective conditional by a base opcode check, to restrict it to VROUND{P,S}{S,D}. --- gas/config/tc-i386.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'gas') diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 4961c2a..8790e1b 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -8230,7 +8230,9 @@ check_VecOperands (const insn_template *t) /* Check the special Imm4 cases; must be the first operand. */ if ((is_cpu (t, CpuXOP) && t->operands == 5) - || (is_cpu (t, CpuAPX_F) && t->opcode_space == SPACE_0F3A)) + || (t->opcode_space == SPACE_0F3A + && (t->base_opcode | 3) == 0x0b + && is_cpu (t, CpuAPX_F))) { if (i.op[0].imms->X_op != O_constant || !fits_in_imm4 (i.op[0].imms->X_add_number)) -- cgit v1.1