From bf0b396de71b76c02f6dd37e61e4044cdccb28d3 Mon Sep 17 00:00:00 2001 From: Andre Vieira Date: Thu, 16 May 2019 14:08:17 +0100 Subject: [PATCH 44/57][Arm][OBJDUMP] Add support for MVE instructions: vcvt and vrint opcodes/ChangeLog: 2019-05-16 Andre Vieira Michael Collison * arm-dis.c (enum mve_instructions): Add new instructions. (enum mve_unpredictable): Add new reasons. (enum mve_undefined): Likewise. (is_mve_encoding_conflict): Handle new instructions. (is_mve_undefined): Likewise. (is_mve_unpredictable): Likewise. (print_mve_undefined): Likewise. (print_mve_unpredictable): Likewise. (print_mve_rounding_mode): Likewise. (print_mve_vcvt_size): Likewise. (print_mve_size): Likewise. (print_insn_mve): Likewise. --- gas/testsuite/gas/arm/mve-vrint-bad.l | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'gas') diff --git a/gas/testsuite/gas/arm/mve-vrint-bad.l b/gas/testsuite/gas/arm/mve-vrint-bad.l index 1d68a82..39fca35 100644 --- a/gas/testsuite/gas/arm/mve-vrint-bad.l +++ b/gas/testsuite/gas/arm/mve-vrint-bad.l @@ -11,7 +11,7 @@ [^:]*:13: Error: bad type in SIMD instruction -- `vrintm.f64 q0,q1' [^:]*:13: Error: bad type in SIMD instruction -- `vrintp.i16 q0,q1' [^:]*:13: Error: bad type in SIMD instruction -- `vrintp.f64 q0,q1' -[^:]*:14: Error: invalid rounding mode -- `vrintr.f16 q0,q1' +[^:]*:14: Error: VFP single, double or Neon quad precision register expected -- `vrintr.f16 q0,q1' [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block [^:]*:25: Warning: instruction is UNPREDICTABLE in an IT block -- cgit v1.1