From b844680a9c739f2920e3911ad35b2779a38be8cb Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 29 Aug 2007 15:34:42 +0000 Subject: gas/testsuite/ 2007-08-29 H.J. Lu * gas/i386/i386.exp: Run reg and reg-intel. * gas/i386/katmai.d: Update bad instructions. * gas/i386/reg.s: New. Add tests for instructions with one register operand. * gas/i386/reg-intel.d: Likewise. * gas/i386/reg.d: Likewise. opcodes/ 2007-08-29 H.J. Lu * i386-dis.c (OP_Skip_MODRM): New. (OP_Monitor): Likewise. (OP_Mwait): Likewise. (Mb): Likewise. (Skip_MODRM): Likewise. (USE_OPC_EXT_TABLE): Likewise. (USE_OPC_EXT_RM_TABLE): Likewise. (PREGRP98...PREGRP100): Likewise. (OPC_EXT_0...OPC_EXT_24): Likewise. (OPC_EXT_RM_0...OPC_EXT_RM_4): Likewise. (lock_prefix): Likewise. (data_prefix): Likewise. (addr_prefix): Likewise. (repz_prefix): Likewise. (repnz_prefix): Likewise. (opc_ext_table): Likewise. (opc_ext_rm_table): Likewise. (get_valid_dis386): Likewise. (OP_VMX): Removed. (OP_0fae): Likewise. (PNI_Fixup): Likewise. (VMX_Fixup): Likewise. (VM): Likewise. (twobyte_uses_DATA_prefix): Likewise. (twobyte_uses_REPNZ_prefix): Likewise. (twobyte_uses_REPZ_prefix): Likewise. (threebyte_0x38_uses_DATA_prefix): Likewise. (threebyte_0x38_uses_REPNZ_prefix): Likewise. (threebyte_0x38_uses_REPZ_prefix): Likewise. (threebyte_0x3a_uses_DATA_prefix): Likewise. (threebyte_0x3a_uses_REPNZ_prefix): Likewise. (threebyte_0x3a_uses_REPZ_prefix): Likewise. (grps): Use OPC_EXT_0...OPC_EXT_24. (prefix_user_table): Use PREGRP98. (print_insn): Remove uses_DATA_prefix, uses_LOCK_prefix, uses_REPNZ_prefix and uses_REPZ_prefix. Initialize repz_prefix, repnz_prefix, lock_prefix, addr_prefix and data_prefix based on prefixes. Call get_valid_dis386 to get a pointer to the valid dis386. Print out prefixes if they aren't NULL. (OP_C): Clear lock_prefix if PREFIX_LOCK is used. (REP_Fixup): Set repz_prefix to "rep " when seeing PREFIX_REPZ. --- gas/testsuite/ChangeLog | 11 +++++++++ gas/testsuite/gas/i386/i386.exp | 2 ++ gas/testsuite/gas/i386/katmai.d | 3 +-- gas/testsuite/gas/i386/reg-intel.d | 47 ++++++++++++++++++++++++++++++++++++++ gas/testsuite/gas/i386/reg.d | 45 ++++++++++++++++++++++++++++++++++++ gas/testsuite/gas/i386/reg.s | 44 +++++++++++++++++++++++++++++++++++ 6 files changed, 150 insertions(+), 2 deletions(-) create mode 100644 gas/testsuite/gas/i386/reg-intel.d create mode 100644 gas/testsuite/gas/i386/reg.d create mode 100644 gas/testsuite/gas/i386/reg.s (limited to 'gas') diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 628b2d9..62020f0 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2007-08-29 H.J. Lu + + * gas/i386/i386.exp: Run reg and reg-intel. + + * gas/i386/katmai.d: Update bad instructions. + + * gas/i386/reg.s: New. Add tests for instructions with one + register operand. + * gas/i386/reg-intel.d: Likewise. + * gas/i386/reg.d: Likewise. + 2007-08-28 H.J. Lu * gas/i386/mem.s: New. Add tests for instructions with one diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index be5e677..6a29127 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -90,6 +90,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "simd-intel" run_dump_test "mem" run_dump_test "mem-intel" + run_dump_test "reg" + run_dump_test "reg-intel" # These tests require support for 8 and 16 bit relocs, # so we only run them for ELF and COFF targets. diff --git a/gas/testsuite/gas/i386/katmai.d b/gas/testsuite/gas/i386/katmai.d index b1fc77d..fc7a89f 100644 --- a/gas/testsuite/gas/i386/katmai.d +++ b/gas/testsuite/gas/i386/katmai.d @@ -165,8 +165,7 @@ Disassembly of section .text: 246: 90 [ ]*nop 247: 90 [ ]*nop 248: 65 [ ]*gs - 249: 0f [ ]*sfence.*\(bad\).* - 24a: ae [ ]*scas %es:\(%edi\),%al + 249: 0f ae[ ]*\(bad\).* 24b: ff 00 [ ]*incl \(%eax\) 24d: 00 00 [ ]*add %al,\(%eax\) ... diff --git a/gas/testsuite/gas/i386/reg-intel.d b/gas/testsuite/gas/i386/reg-intel.d new file mode 100644 index 0000000..9cb32b6 --- /dev/null +++ b/gas/testsuite/gas/i386/reg-intel.d @@ -0,0 +1,47 @@ +#source: reg.s +#as: -J +#objdump: -dw -Mintel +#name: i386 reg (Intel mode) + +.*: +file format .* + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 0f 71 d6 02 psrlw mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw xmm6,0x2 +[ ]*[a-f0-9]+: 0f 71 e6 02 psraw mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 71 e6 02 psraw xmm6,0x2 +[ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw xmm6,0x2 +[ ]*[a-f0-9]+: 0f 72 d6 02 psrld mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld xmm6,0x2 +[ ]*[a-f0-9]+: 0f 72 e6 02 psrad mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 72 e6 02 psrad xmm6,0x2 +[ ]*[a-f0-9]+: 0f 72 f6 02 pslld mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 72 f6 02 pslld xmm6,0x2 +[ ]*[a-f0-9]+: 0f 73 d6 02 psrlq mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 d6 02 psrlq xmm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 de 02 psrldq xmm6,0x2 +[ ]*[a-f0-9]+: 0f 73 f6 02 psllq mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 f6 02 psllq xmm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 fe 02 pslldq xmm6,0x2 +[ ]*[a-f0-9]+: 0f 71 d6 02 psrlw mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw xmm6,0x2 +[ ]*[a-f0-9]+: 0f 71 e6 02 psraw mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 71 e6 02 psraw xmm6,0x2 +[ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw xmm6,0x2 +[ ]*[a-f0-9]+: 0f 72 d6 02 psrld mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld xmm6,0x2 +[ ]*[a-f0-9]+: 0f 72 e6 02 psrad mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 72 e6 02 psrad xmm6,0x2 +[ ]*[a-f0-9]+: 0f 72 f6 02 pslld mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 72 f6 02 pslld xmm6,0x2 +[ ]*[a-f0-9]+: 0f 73 d6 02 psrlq mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 d6 02 psrlq xmm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 de 02 psrldq xmm6,0x2 +[ ]*[a-f0-9]+: 0f 73 f6 02 psllq mm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 f6 02 psllq xmm6,0x2 +[ ]*[a-f0-9]+: 66 0f 73 fe 02 pslldq xmm6,0x2 +#pass diff --git a/gas/testsuite/gas/i386/reg.d b/gas/testsuite/gas/i386/reg.d new file mode 100644 index 0000000..29b6111 --- /dev/null +++ b/gas/testsuite/gas/i386/reg.d @@ -0,0 +1,45 @@ +#objdump: -dw +#name: i386 reg + +.*: file format .* + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 0f 71 d6 02 psrlw \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 71 e6 02 psraw \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 71 e6 02 psraw \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 72 d6 02 psrld \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 72 e6 02 psrad \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 72 e6 02 psrad \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 72 f6 02 pslld \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 72 f6 02 pslld \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 73 d6 02 psrlq \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 73 d6 02 psrlq \$0x2,%xmm6 +[ ]*[a-f0-9]+: 66 0f 73 de 02 psrldq \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 73 f6 02 psllq \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 73 f6 02 psllq \$0x2,%xmm6 +[ ]*[a-f0-9]+: 66 0f 73 fe 02 pslldq \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 71 d6 02 psrlw \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 71 d6 02 psrlw \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 71 e6 02 psraw \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 71 e6 02 psraw \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 72 d6 02 psrld \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 72 d6 02 psrld \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 72 e6 02 psrad \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 72 e6 02 psrad \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 72 f6 02 pslld \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 72 f6 02 pslld \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 73 d6 02 psrlq \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 73 d6 02 psrlq \$0x2,%xmm6 +[ ]*[a-f0-9]+: 66 0f 73 de 02 psrldq \$0x2,%xmm6 +[ ]*[a-f0-9]+: 0f 73 f6 02 psllq \$0x2,%mm6 +[ ]*[a-f0-9]+: 66 0f 73 f6 02 psllq \$0x2,%xmm6 +[ ]*[a-f0-9]+: 66 0f 73 fe 02 pslldq \$0x2,%xmm6 +#pass diff --git a/gas/testsuite/gas/i386/reg.s b/gas/testsuite/gas/i386/reg.s new file mode 100644 index 0000000..3635aee --- /dev/null +++ b/gas/testsuite/gas/i386/reg.s @@ -0,0 +1,44 @@ +# Check instructions with one register operand + + .text +_start: +psrlw $2, %mm6 +psrlw $2, %xmm6 +psraw $2, %mm6 +psraw $2, %xmm6 +psllw $2, %mm6 +psllw $2, %xmm6 +psrld $2, %mm6 +psrld $2, %xmm6 +psrad $2, %mm6 +psrad $2, %xmm6 +pslld $2, %mm6 +pslld $2, %xmm6 +psrlq $2, %mm6 +psrlq $2, %xmm6 +psrldq $2, %xmm6 +psllq $2, %mm6 +psllq $2, %xmm6 +pslldq $2, %xmm6 + +.intel_syntax noprefix +psrlw mm6, 2 +psrlw xmm6, 2 +psraw mm6, 2 +psraw xmm6, 2 +psllw mm6, 2 +psllw xmm6, 2 +psrld mm6, 2 +psrld xmm6, 2 +psrad mm6, 2 +psrad xmm6, 2 +pslld mm6, 2 +pslld xmm6, 2 +psrlq mm6, 2 +psrlq xmm6, 2 +psrldq xmm6, 2 +psllq mm6, 2 +psllq xmm6, 2 +pslldq xmm6, 2 + +.p2align 4,0 -- cgit v1.1