From 8254c3d2c94ae5458095ea6c25446ba89134b9da Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Christoph=20M=C3=BCllner?= Date: Fri, 1 Jul 2022 05:21:01 +0200 Subject: RISC-V: Add T-Head Bitmanip vendor extension MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the XThead{Ba,Bb,Bs} extensions, a collection of T-Head-specific bitmanipulation instructions. The 'th' prefix and the "XThead{Ba,Bb,Bs}" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia Signed-off-by: Christoph Müllner --- gas/doc/c-riscv.texi | 15 +++++++++++++++ gas/testsuite/gas/riscv/x-thead-ba-fail.d | 3 +++ gas/testsuite/gas/riscv/x-thead-ba-fail.l | 3 +++ gas/testsuite/gas/riscv/x-thead-ba-fail.s | 3 +++ gas/testsuite/gas/riscv/x-thead-ba.d | 13 +++++++++++++ gas/testsuite/gas/riscv/x-thead-ba.s | 6 ++++++ gas/testsuite/gas/riscv/x-thead-bb-fail.d | 3 +++ gas/testsuite/gas/riscv/x-thead-bb-fail.l | 7 +++++++ gas/testsuite/gas/riscv/x-thead-bb-fail.s | 7 +++++++ gas/testsuite/gas/riscv/x-thead-bb.d | 30 ++++++++++++++++++++++++++++++ gas/testsuite/gas/riscv/x-thead-bb.s | 22 ++++++++++++++++++++++ gas/testsuite/gas/riscv/x-thead-bs-fail.d | 3 +++ gas/testsuite/gas/riscv/x-thead-bs-fail.l | 3 +++ gas/testsuite/gas/riscv/x-thead-bs-fail.s | 3 +++ gas/testsuite/gas/riscv/x-thead-bs.d | 14 ++++++++++++++ gas/testsuite/gas/riscv/x-thead-bs.s | 6 ++++++ 16 files changed, 141 insertions(+) create mode 100644 gas/testsuite/gas/riscv/x-thead-ba-fail.d create mode 100644 gas/testsuite/gas/riscv/x-thead-ba-fail.l create mode 100644 gas/testsuite/gas/riscv/x-thead-ba-fail.s create mode 100644 gas/testsuite/gas/riscv/x-thead-ba.d create mode 100644 gas/testsuite/gas/riscv/x-thead-ba.s create mode 100644 gas/testsuite/gas/riscv/x-thead-bb-fail.d create mode 100644 gas/testsuite/gas/riscv/x-thead-bb-fail.l create mode 100644 gas/testsuite/gas/riscv/x-thead-bb-fail.s create mode 100644 gas/testsuite/gas/riscv/x-thead-bb.d create mode 100644 gas/testsuite/gas/riscv/x-thead-bb.s create mode 100644 gas/testsuite/gas/riscv/x-thead-bs-fail.d create mode 100644 gas/testsuite/gas/riscv/x-thead-bs-fail.l create mode 100644 gas/testsuite/gas/riscv/x-thead-bs-fail.s create mode 100644 gas/testsuite/gas/riscv/x-thead-bs.d create mode 100644 gas/testsuite/gas/riscv/x-thead-bs.s (limited to 'gas') diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index c55dd0b..570a4f4 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -704,6 +704,21 @@ extensions supported and provides the location of their publicly-released documentation: @table @r +@item XTheadBa +The XTheadBa extension provides instructions for address calculations. + +It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}. + +@item XTheadBb +The XTheadBb extension provides instructions for basic bit-manipulation + +It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}. + +@item XTheadBs +The XTheadBs extension provides single-bit instructions. + +It is documented in @url{https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.0.0/xthead-2022-09-05-2.0.0.pdf}. + @item XTheadCmo The XTheadCmo extension provides instructions for cache management. diff --git a/gas/testsuite/gas/riscv/x-thead-ba-fail.d b/gas/testsuite/gas/riscv/x-thead-ba-fail.d new file mode 100644 index 0000000..9fbb935 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-ba-fail.d @@ -0,0 +1,3 @@ +#as: -march=rv64i_xtheadba +#source: x-thead-ba-fail.s +#error_output: x-thead-ba-fail.l diff --git a/gas/testsuite/gas/riscv/x-thead-ba-fail.l b/gas/testsuite/gas/riscv/x-thead-ba-fail.l new file mode 100644 index 0000000..4bb12e7 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-ba-fail.l @@ -0,0 +1,3 @@ +.*: Assembler messages: +.*: Error: improper immediate value \(18446744073709551615\) +.*: Error: improper immediate value \(4\) diff --git a/gas/testsuite/gas/riscv/x-thead-ba-fail.s b/gas/testsuite/gas/riscv/x-thead-ba-fail.s new file mode 100644 index 0000000..9a3b27d --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-ba-fail.s @@ -0,0 +1,3 @@ +target: + th.addsl a0, a1, a2, -1 + th.addsl a0, a1, a2, 4 diff --git a/gas/testsuite/gas/riscv/x-thead-ba.d b/gas/testsuite/gas/riscv/x-thead-ba.d new file mode 100644 index 0000000..bf4f8a5 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-ba.d @@ -0,0 +1,13 @@ +#as: -march=rv64i_xtheadba +#source: x-thead-ba.s +#objdump: -dr + +.*:[ ]+file format .* + +Disassembly of section .text: + +0+000 : +[ ]+[0-9a-f]+:[ ]+00c5950b[ ]+th.addsl[ ]+a0,a1,a2,0 +[ ]+[0-9a-f]+:[ ]+02c5950b[ ]+th.addsl[ ]+a0,a1,a2,1 +[ ]+[0-9a-f]+:[ ]+04c5950b[ ]+th.addsl[ ]+a0,a1,a2,2 +[ ]+[0-9a-f]+:[ ]+06c5950b[ ]+th.addsl[ ]+a0,a1,a2,3 diff --git a/gas/testsuite/gas/riscv/x-thead-ba.s b/gas/testsuite/gas/riscv/x-thead-ba.s new file mode 100644 index 0000000..5081c06 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-ba.s @@ -0,0 +1,6 @@ +target: + th.addsl a0, a1, a2, 0 + th.addsl a0, a1, a2, 1 + th.addsl a0, a1, a2, 2 + th.addsl a0, a1, a2, 3 + diff --git a/gas/testsuite/gas/riscv/x-thead-bb-fail.d b/gas/testsuite/gas/riscv/x-thead-bb-fail.d new file mode 100644 index 0000000..1dc4c06 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bb-fail.d @@ -0,0 +1,3 @@ +#as: -march=rv64i_xtheadbb +#source: x-thead-bb-fail.s +#error_output: x-thead-bb-fail.l diff --git a/gas/testsuite/gas/riscv/x-thead-bb-fail.l b/gas/testsuite/gas/riscv/x-thead-bb-fail.l new file mode 100644 index 0000000..dd4a0df --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bb-fail.l @@ -0,0 +1,7 @@ +.*: Assembler messages: +.*: Error: improper immediate value \(18446744073709551615\) +.*: Error: improper immediate value \(64\) +.*: Error: improper immediate value \(18446744073709551615\) +.*: Error: improper immediate value \(32\) +.*: Error: illegal operands `th.ext a0,64,62' +.*: Error: illegal operands `th.extu a0,-1,0' diff --git a/gas/testsuite/gas/riscv/x-thead-bb-fail.s b/gas/testsuite/gas/riscv/x-thead-bb-fail.s new file mode 100644 index 0000000..5b91f50 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bb-fail.s @@ -0,0 +1,7 @@ +target: + th.srri a0, a1, -1 + th.srri a0, a1, 64 + th.srriw a0, a1, -1 + th.srriw a0, a1, 32 + th.ext a0, 64, 62 + th.extu a0, -1, 0 diff --git a/gas/testsuite/gas/riscv/x-thead-bb.d b/gas/testsuite/gas/riscv/x-thead-bb.d new file mode 100644 index 0000000..3e5547a --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bb.d @@ -0,0 +1,30 @@ +#as: -march=rv64i_xtheadbb +#source: x-thead-bb.s +#objdump: -dr + +.*:[ ]+file format .* + +Disassembly of section .text: + +0+000 : +[ ]+[0-9a-f]+:[ ]+1005950b[ ]+th.srri[ ]+a0,a1,0 +[ ]+[0-9a-f]+:[ ]+1015950b[ ]+th.srri[ ]+a0,a1,1 +[ ]+[0-9a-f]+:[ ]+13e5950b[ ]+th.srri[ ]+a0,a1,62 +[ ]+[0-9a-f]+:[ ]+13f5950b[ ]+th.srri[ ]+a0,a1,63 +[ ]+[0-9a-f]+:[ ]+1405950b[ ]+th.srriw[ ]+a0,a1,0 +[ ]+[0-9a-f]+:[ ]+1415950b[ ]+th.srriw[ ]+a0,a1,1 +[ ]+[0-9a-f]+:[ ]+15e5950b[ ]+th.srriw[ ]+a0,a1,30 +[ ]+[0-9a-f]+:[ ]+15f5950b[ ]+th.srriw[ ]+a0,a1,31 +[ ]+[0-9a-f]+:[ ]+0405a50b[ ]+th.ext[ ]+a0,a1,1,0 +[ ]+[0-9a-f]+:[ ]+7c05a50b[ ]+th.ext[ ]+a0,a1,31,0 +[ ]+[0-9a-f]+:[ ]+fdf5a50b[ ]+th.ext[ ]+a0,a1,63,31 +[ ]+[0-9a-f]+:[ ]+ffe5a50b[ ]+th.ext[ ]+a0,a1,63,62 +[ ]+[0-9a-f]+:[ ]+0405b50b[ ]+th.extu[ ]+a0,a1,1,0 +[ ]+[0-9a-f]+:[ ]+7c05b50b[ ]+th.extu[ ]+a0,a1,31,0 +[ ]+[0-9a-f]+:[ ]+fdf5b50b[ ]+th.extu[ ]+a0,a1,63,31 +[ ]+[0-9a-f]+:[ ]+ffe5b50b[ ]+th.extu[ ]+a0,a1,63,62 +[ ]+[0-9a-f]+:[ ]+8405950b[ ]+th.ff0[ ]+a0,a1 +[ ]+[0-9a-f]+:[ ]+8605950b[ ]+th.ff1[ ]+a0,a1 +[ ]+[0-9a-f]+:[ ]+8205950b[ ]+th.rev[ ]+a0,a1 +[ ]+[0-9a-f]+:[ ]+9005950b[ ]+th.revw[ ]+a0,a1 +[ ]+[0-9a-f]+:[ ]+8005950b[ ]+th.tstnbz[ ]+a0,a1 diff --git a/gas/testsuite/gas/riscv/x-thead-bb.s b/gas/testsuite/gas/riscv/x-thead-bb.s new file mode 100644 index 0000000..e31b3b6 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bb.s @@ -0,0 +1,22 @@ +target: + th.srri a0, a1, 0 + th.srri a0, a1, 1 + th.srri a0, a1, 62 + th.srri a0, a1, 63 + th.srriw a0, a1, 0 + th.srriw a0, a1, 1 + th.srriw a0, a1, 30 + th.srriw a0, a1, 31 + th.ext a0, a1, 1, 0 + th.ext a0, a1, 31, 0 + th.ext a0, a1, 63, 31 + th.ext a0, a1, 63, 62 + th.extu a0, a1, 1, 0 + th.extu a0, a1, 31, 0 + th.extu a0, a1, 63, 31 + th.extu a0, a1, 63, 62 + th.ff0 a0, a1 + th.ff1 a0, a1 + th.rev a0, a1 + th.revw a0, a1 + th.tstnbz a0, a1 diff --git a/gas/testsuite/gas/riscv/x-thead-bs-fail.d b/gas/testsuite/gas/riscv/x-thead-bs-fail.d new file mode 100644 index 0000000..9326552 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bs-fail.d @@ -0,0 +1,3 @@ +#as: -march=rv64i_xtheadbs +#source: x-thead-bs-fail.s +#error_output: x-thead-bs-fail.l diff --git a/gas/testsuite/gas/riscv/x-thead-bs-fail.l b/gas/testsuite/gas/riscv/x-thead-bs-fail.l new file mode 100644 index 0000000..c8a7ff4 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bs-fail.l @@ -0,0 +1,3 @@ +.*: Assembler messages: +.*: Error: improper immediate value \(18446744073709551615\) +.*: Error: improper immediate value \(64\) diff --git a/gas/testsuite/gas/riscv/x-thead-bs-fail.s b/gas/testsuite/gas/riscv/x-thead-bs-fail.s new file mode 100644 index 0000000..fbb296e --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bs-fail.s @@ -0,0 +1,3 @@ +target: + th.tst a0, a1, -1 + th.tst a0, a1, 64 diff --git a/gas/testsuite/gas/riscv/x-thead-bs.d b/gas/testsuite/gas/riscv/x-thead-bs.d new file mode 100644 index 0000000..18cfd28 --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bs.d @@ -0,0 +1,14 @@ +#as: -march=rv64i_xtheadbs +#source: x-thead-bs.s +#objdump: -dr + +.*:[ ]+file format .* + +Disassembly of section .text: + +0+000 : +[ ]+[0-9a-f]+:[ ]+8805950b[ ]+th.tst[ ]+a0,a1,0 +[ ]+[0-9a-f]+:[ ]+8815950b[ ]+th.tst[ ]+a0,a1,1 +[ ]+[0-9a-f]+:[ ]+89f5950b[ ]+th.tst[ ]+a0,a1,31 +[ ]+[0-9a-f]+:[ ]+8a05950b[ ]+th.tst[ ]+a0,a1,32 +[ ]+[0-9a-f]+:[ ]+8bf5950b[ ]+th.tst[ ]+a0,a1,63 diff --git a/gas/testsuite/gas/riscv/x-thead-bs.s b/gas/testsuite/gas/riscv/x-thead-bs.s new file mode 100644 index 0000000..39db01c --- /dev/null +++ b/gas/testsuite/gas/riscv/x-thead-bs.s @@ -0,0 +1,6 @@ +target: + th.tst a0, a1, 0 + th.tst a0, a1, 1 + th.tst a0, a1, 31 + th.tst a0, a1, 32 + th.tst a0, a1, 63 -- cgit v1.1