From 73a63ccf2f0f856eebf7fee67309fe2a276c39d6 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 22 Sep 2010 20:59:00 +0000 Subject: opcodes/gas: blackfin: support OUTC debug insn The disassembler has partial (but incomplete/broken) support already for the pseudo debug insn OUTC, so let's fix it up and finish it. And now that the disassembler can handle it, make sure our assembler can output it too. Signed-off-by: Mike Frysinger --- gas/ChangeLog | 6 ++++++ gas/config/bfin-aux.h | 1 + gas/config/bfin-parse.y | 16 ++++++++++++++++ gas/config/tc-bfin.c | 10 ++++++++++ 4 files changed, 33 insertions(+) (limited to 'gas') diff --git a/gas/ChangeLog b/gas/ChangeLog index 551525b..039c338 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,11 @@ 2010-09-22 Mike Frysinger + * config/bfin-aux.h (bfin_gen_pseudochr): New prototype. + * config/tc-bfin.c (bfin_gen_pseudochr): New function. + * config/bfin-parse.y: Call bfin_gen_pseudochr for OUTC tokens. + +2010-09-22 Mike Frysinger + * config/bfin-lex.l (abort): Accept case-insensitive abort insn. * config/bfin-parse.y (ABORT): Handle the ABORT token. diff --git a/gas/config/bfin-aux.h b/gas/config/bfin-aux.h index 638df31..465a6af 100755 --- a/gas/config/bfin-aux.h +++ b/gas/config/bfin-aux.h @@ -63,5 +63,6 @@ INSTR_T bfin_gen_calla (Expr_Node *, int); INSTR_T bfin_gen_linkage (int, int); INSTR_T bfin_gen_pseudodbg (int, int, int); INSTR_T bfin_gen_pseudodbg_assert (int, REG_T, int); +INSTR_T bfin_gen_pseudochr (int); bfd_boolean bfin_resource_conflict (INSTR_T, INSTR_T, INSTR_T); INSTR_T bfin_gen_multi_instr (INSTR_T, INSTR_T, INSTR_T); diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y index 747442c..f8bb744 100644 --- a/gas/config/bfin-parse.y +++ b/gas/config/bfin-parse.y @@ -212,6 +212,7 @@ extern int yylex (void); #define uimm5(x) EXPR_VALUE (x) #define imm6(x) EXPR_VALUE (x) #define imm7(x) EXPR_VALUE (x) +#define uimm8(x) EXPR_VALUE (x) #define imm16(x) EXPR_VALUE (x) #define uimm16s4(x) ((EXPR_VALUE (x)) >> 2) #define uimm16(x) EXPR_VALUE (x) @@ -3618,6 +3619,21 @@ asm_1: $$ = bfin_gen_pseudodbg_assert (2, &$3, uimm16 ($5)); } + | OUTC expr + { + if (!IS_UIMM ($2, 8)) + return yyerror ("Constant out of range"); + notethat ("psedodbg_assert: OUTC uimm8\n"); + $$ = bfin_gen_pseudochr (uimm8 ($2)); + } + + | OUTC REG + { + if (!IS_DREG ($2)) + return yyerror ("Dregs expected"); + notethat ("psedodbg_assert: OUTC dreg\n"); + $$ = bfin_gen_pseudodbg (2, $2.regno & CODE_MASK, 0); + } ; diff --git a/gas/config/tc-bfin.c b/gas/config/tc-bfin.c index 5746904..ccd14cb 100644 --- a/gas/config/tc-bfin.c +++ b/gas/config/tc-bfin.c @@ -1820,6 +1820,16 @@ bfin_gen_pseudodbg_assert (int dbgop, REG_T regtest, int expected) return GEN_OPCODE32 (); } +INSTR_T +bfin_gen_pseudochr (int ch) +{ + INIT (PseudoChr); + + ASSIGN (ch); + + return GEN_OPCODE16 (); +} + /* Multiple instruction generation. */ INSTR_T -- cgit v1.1