From 2d5428d8cdd9c72f0a1738de775c2c841b334d55 Mon Sep 17 00:00:00 2001
From: Lingling Kong <lingling.kong@intel.com>
Date: Tue, 2 Jul 2024 15:49:19 +0800
Subject: x86-64: Support APX NF TLS IE with 2 operands

Support APX NF TLS IE with 2 operands.Verify it with ld and gold.

gas/

	* config/tc-i386.c (md_assemble): Allow APX NF TLS IE with
	2 operands.
	* testsuite/gas/i386/x86-64-gottpoff.d: Updated.
	* testsuite/gas/i386/x86-64-gottpoff.s: Add APX NF TLS IE
	tests with 2 operands.

gold/

	* testsuite/x86_64_ie_to_le.s: Add APX NF TLS IE tests with
	2 operands.
	* testsuite/x86_64_ie_to_le.sh: Updated.

ld/

	* testsuite/ld-x86-64/tlsbindesc.s: Add APX NF TLS IE tests
	with 2 operands.
	* testsuite/ld-x86-64/tlsbindesc.d: Updated.
	* testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
---
 gas/config/tc-i386.c                     | 10 ++++++++--
 gas/testsuite/gas/i386/x86-64-gottpoff.d |  4 ++++
 gas/testsuite/gas/i386/x86-64-gottpoff.s | 10 ++++++++++
 3 files changed, 22 insertions(+), 2 deletions(-)

(limited to 'gas')

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 2e19431..3b4d9ca 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7545,8 +7545,14 @@ md_assemble (char *line)
 		&& i.base_reg
 		&& i.base_reg->reg_num == RegIP
 		&& i.tm.operand_types[0].bitfield.class == Reg
-		&& i.tm.operand_types[2].bitfield.class == Reg)
-	      /* Allow APX: add %reg1, foo@gottpoff(%rip), %reg2.  */
+		&& (i.tm.operand_types[2].bitfield.class == Reg
+		    || i.tm.operands == 2))
+	      /* Allow APX:
+		 add %reg1, foo@gottpoff(%rip), %reg2
+		 add foo@gottpoff(%rip), %reg, %reg2
+		 {nf} add foo@gottpoff(%rip), %reg
+		 {nf} add %reg1, foo@gottpoff(%rip), %reg2
+		 {nf} add foo@gottpoff(%rip), %reg, %reg2.  */
 	      break;
 	    /* Fall through.  */
 	  case BFD_RELOC_386_TLS_GOTIE:
diff --git a/gas/testsuite/gas/i386/x86-64-gottpoff.d b/gas/testsuite/gas/i386/x86-64-gottpoff.d
index 5d0dd58..8f1c10f 100644
--- a/gas/testsuite/gas/i386/x86-64-gottpoff.d
+++ b/gas/testsuite/gas/i386/x86-64-gottpoff.d
@@ -24,4 +24,8 @@ Disassembly of section .text:
  +[a-f0-9]+:	62 f4 9c 18 03 05 00 00 00 00 	add    0x0\(%rip\),%rax,%r12        # 78 <_start\+0x78>	74: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
  +[a-f0-9]+:	62 74 fc 14 01 05 00 00 00 00 	\{nf\} add %r8,0x0\(%rip\),%r16        # 82 <_start\+0x82>	7e: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
  +[a-f0-9]+:	62 f4 9c 1c 03 05 00 00 00 00 	\{nf\} add 0x0\(%rip\),%rax,%r12        # 8c <_start\+0x8c>	88: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 f4 fc 0c 03 05 00 00 00 00 	\{nf\} add 0x0\(%rip\),%rax        # 96 <_start\+0x96>	92: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 e4 fc 0c 03 05 00 00 00 00 	\{nf\} add 0x0\(%rip\),%r16        # a0 <_start\+0xa0>	9c: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 f4 fc 0c 03 05 00 00 00 00 	\{nf\} add 0x0\(%rip\),%rax        # aa <_start\+0xaa>	a6: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
+ +[a-f0-9]+:	62 e4 fc 0c 03 05 00 00 00 00 	\{nf\} add 0x0\(%rip\),%r16        # b4 <_start\+0xb4>	b0: R_X86_64_CODE_6_GOTTPOFF	foo-0x4
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-gottpoff.s b/gas/testsuite/gas/i386/x86-64-gottpoff.s
index d1f5501..48d8a59 100644
--- a/gas/testsuite/gas/i386/x86-64-gottpoff.s
+++ b/gas/testsuite/gas/i386/x86-64-gottpoff.s
@@ -27,3 +27,13 @@ _start:
 	add	r12, rax, QWORD PTR [rip + foo@GOTTPOFF]
 	{nf} add	r16, QWORD PTR [rip + foo@GOTTPOFF], r8
 	{nf} add	r12, rax, QWORD PTR [rip + foo@GOTTPOFF]
+
+	.att_syntax prefix
+
+	{nf} addq	foo@GOTTPOFF(%rip), %rax
+	{nf} addq	foo@GOTTPOFF(%rip), %r16
+
+	.intel_syntax noprefix
+
+	{nf} add	rax, QWORD PTR [rip + foo@GOTTPOFF]
+	{nf} add	r16, QWORD PTR [rip + foo@GOTTPOFF]
-- 
cgit v1.1