From 21a186f28061ea51e422ae47d062793ceac2180f Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Wed, 20 Dec 2017 13:37:44 -0800 Subject: RISC-V: Add compressed instruction hints, and a few misc cleanups. gas/ * config/tc-riscv.c (risc_ip) : Add comment. * testsuite/gas/riscv/c-nonzero-imm.d, * testsuite/gas/riscv/c-nonzero-imm.l, * testsuite/gas/riscv/c-nonzero-imm.s, * testsuite/gas/riscv/c-nonzero-reg.d, * testsuite/gas/riscv/c-nonzero-reg.l, * testsuite/gas/riscv/c-nonzero-reg.s, * testsuite/gas/riscv/c-zero-imm-64.d, * testsuite/gas/riscv/c-zero-imm-64.s, * testsuite/gas/riscv/c-zero-imm.d, testsuite/gas/riscv/c-zero-imm.s, * testsuite/gas/riscv/c-zero-reg.d, * testsuite/gas/riscv/c-zero-reg.s: New. opcodes/ * riscv-opc.c (match_c_add_with_hint, match_c_lui_with_hint): New. (riscv_opcodes)
  • : Delete "d,0" line. Change Cj to Co. : Change Cj to Co. : Add explanatory comment for 4-operand add instruction. : Add support for immediate operand. : Use match_c_add_with_hint instead of match_c_add. : Use match_c_lui_with_hint instead of match_c_lui. : Use match_opcode instead of match_rd_nonzero. --- gas/ChangeLog | 15 +++++++++++++++ gas/config/tc-riscv.c | 3 +++ gas/testsuite/gas/riscv/c-nonzero-imm.d | 3 +++ gas/testsuite/gas/riscv/c-nonzero-imm.l | 2 ++ gas/testsuite/gas/riscv/c-nonzero-imm.s | 3 +++ gas/testsuite/gas/riscv/c-nonzero-reg.d | 3 +++ gas/testsuite/gas/riscv/c-nonzero-reg.l | 4 ++++ gas/testsuite/gas/riscv/c-nonzero-reg.s | 3 +++ gas/testsuite/gas/riscv/c-zero-imm-64.d | 11 +++++++++++ gas/testsuite/gas/riscv/c-zero-imm-64.s | 4 ++++ gas/testsuite/gas/riscv/c-zero-imm.d | 16 ++++++++++++++++ gas/testsuite/gas/riscv/c-zero-imm.s | 10 ++++++++++ gas/testsuite/gas/riscv/c-zero-reg.d | 20 ++++++++++++++++++++ gas/testsuite/gas/riscv/c-zero-reg.s | 13 +++++++++++++ 14 files changed, 110 insertions(+) create mode 100644 gas/testsuite/gas/riscv/c-nonzero-imm.d create mode 100644 gas/testsuite/gas/riscv/c-nonzero-imm.l create mode 100644 gas/testsuite/gas/riscv/c-nonzero-imm.s create mode 100644 gas/testsuite/gas/riscv/c-nonzero-reg.d create mode 100644 gas/testsuite/gas/riscv/c-nonzero-reg.l create mode 100644 gas/testsuite/gas/riscv/c-nonzero-reg.s create mode 100644 gas/testsuite/gas/riscv/c-zero-imm-64.d create mode 100644 gas/testsuite/gas/riscv/c-zero-imm-64.s create mode 100644 gas/testsuite/gas/riscv/c-zero-imm.d create mode 100644 gas/testsuite/gas/riscv/c-zero-imm.s create mode 100644 gas/testsuite/gas/riscv/c-zero-reg.d create mode 100644 gas/testsuite/gas/riscv/c-zero-reg.s (limited to 'gas') diff --git a/gas/ChangeLog b/gas/ChangeLog index 525f771..3d12e93 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,18 @@ +2017-12-20 Jim Wilson + + * config/tc-riscv.c (risc_ip) : Add comment. + * testsuite/gas/riscv/c-nonzero-imm.d, + * testsuite/gas/riscv/c-nonzero-imm.l, + * testsuite/gas/riscv/c-nonzero-imm.s, + * testsuite/gas/riscv/c-nonzero-reg.d, + * testsuite/gas/riscv/c-nonzero-reg.l, + * testsuite/gas/riscv/c-nonzero-reg.s, + * testsuite/gas/riscv/c-zero-imm-64.d, + * testsuite/gas/riscv/c-zero-imm-64.s, + * testsuite/gas/riscv/c-zero-imm.d, testsuite/gas/riscv/c-zero-imm.s, + * testsuite/gas/riscv/c-zero-reg.d, + * testsuite/gas/riscv/c-zero-reg.s: New. + 2017-12-19 Tamar Christina PR 22559 diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index c2e5f30..a4e01b6 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -1384,6 +1384,9 @@ rvc_imm_done: case 'o': if (my_getSmallExpression (imm_expr, imm_reloc, s, p) || imm_expr->X_op != O_constant + /* C.addiw, c.li, and c.andi allow zero immediate. + C.addi allows zero immediate as hint. Otherwise this + is same as 'j'. */ || !VALID_RVC_IMM (imm_expr->X_add_number)) break; ip->insn_opcode |= ENCODE_RVC_IMM (imm_expr->X_add_number); diff --git a/gas/testsuite/gas/riscv/c-nonzero-imm.d b/gas/testsuite/gas/riscv/c-nonzero-imm.d new file mode 100644 index 0000000..2c62290 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-nonzero-imm.d @@ -0,0 +1,3 @@ +#as: +#objdump: -dr +#error-output: c-nonzero-imm.l diff --git a/gas/testsuite/gas/riscv/c-nonzero-imm.l b/gas/testsuite/gas/riscv/c-nonzero-imm.l new file mode 100644 index 0000000..0932719 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-nonzero-imm.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*: Error: illegal operands `c.nop 0' diff --git a/gas/testsuite/gas/riscv/c-nonzero-imm.s b/gas/testsuite/gas/riscv/c-nonzero-imm.s new file mode 100644 index 0000000..1b876ab --- /dev/null +++ b/gas/testsuite/gas/riscv/c-nonzero-imm.s @@ -0,0 +1,3 @@ + .option rvc + c.nop 0 + c.nop 1 diff --git a/gas/testsuite/gas/riscv/c-nonzero-reg.d b/gas/testsuite/gas/riscv/c-nonzero-reg.d new file mode 100644 index 0000000..39a65b5 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-nonzero-reg.d @@ -0,0 +1,3 @@ +#as: -march=rv64gc +#objdump: -dr +#error-output: c-nonzero-reg.l diff --git a/gas/testsuite/gas/riscv/c-nonzero-reg.l b/gas/testsuite/gas/riscv/c-nonzero-reg.l new file mode 100644 index 0000000..1d8fb6b --- /dev/null +++ b/gas/testsuite/gas/riscv/c-nonzero-reg.l @@ -0,0 +1,4 @@ +.*: Assembler messages: +.*: Error: illegal operands `c.addiw x0,10' +.*: Error: illegal operands `c.jr x0' + diff --git a/gas/testsuite/gas/riscv/c-nonzero-reg.s b/gas/testsuite/gas/riscv/c-nonzero-reg.s new file mode 100644 index 0000000..23d51c3 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-nonzero-reg.s @@ -0,0 +1,3 @@ + .option rvc + c.addiw x0, 10 + c.jr x0 diff --git a/gas/testsuite/gas/riscv/c-zero-imm-64.d b/gas/testsuite/gas/riscv/c-zero-imm-64.d new file mode 100644 index 0000000..9d1e490 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-zero-imm-64.d @@ -0,0 +1,11 @@ +#as: -march=rv64gc +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <.text>: +[ ]+0:[ ]+2801[ ]+sext.w[ ]+a6,a6 +[ ]+2:[ ]+2881[ ]+sext.w[ ]+a7,a7 diff --git a/gas/testsuite/gas/riscv/c-zero-imm-64.s b/gas/testsuite/gas/riscv/c-zero-imm-64.s new file mode 100644 index 0000000..ffe743e --- /dev/null +++ b/gas/testsuite/gas/riscv/c-zero-imm-64.s @@ -0,0 +1,4 @@ + .option rvc + # These are valid instructions. + addiw a6,a6,0 + c.addiw a7,0 diff --git a/gas/testsuite/gas/riscv/c-zero-imm.d b/gas/testsuite/gas/riscv/c-zero-imm.d new file mode 100644 index 0000000..ac47e80 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-zero-imm.d @@ -0,0 +1,16 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <.text>: +[ ]+0:[ ]+4501[ ]+li[ ]+a0,0 +[ ]+2:[ ]+4581[ ]+li[ ]+a1,0 +[ ]+4:[ ]+8a01[ ]+andi[ ]+a2,a2,0 +[ ]+6:[ ]+8a81[ ]+andi[ ]+a3,a3,0 +[ ]+8:[ ]+00070713[ ]+mv[ ]+a4,a4 +[ ]+c:[ ]+0781[ ]+addi[ ]+a5,a5,0 +#... diff --git a/gas/testsuite/gas/riscv/c-zero-imm.s b/gas/testsuite/gas/riscv/c-zero-imm.s new file mode 100644 index 0000000..650313d --- /dev/null +++ b/gas/testsuite/gas/riscv/c-zero-imm.s @@ -0,0 +1,10 @@ + .option rvc + # These are valid instructions. + li a0,0 + c.li a1,0 + andi a2,a2,0 + c.andi a3,0 + # Don't let this compress to a hint. + addi a4,a4,0 + # These are hints. + c.addi a5,0 diff --git a/gas/testsuite/gas/riscv/c-zero-reg.d b/gas/testsuite/gas/riscv/c-zero-reg.d new file mode 100644 index 0000000..2daf896 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-zero-reg.d @@ -0,0 +1,20 @@ +#as: +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <.text>: +[ ]+0:[ ]+4005[ ]+c.li[ ]+zero,1 +[ ]+2:[ ]+6009[ ]+c.lui[ ]+zero,0x2 +[ ]+4:[ ]+000e[ ]+c.slli[ ]+zero,0x3 +[ ]+6:[ ]+8006[ ]+c.mv[ ]+zero,ra +[ ]+8:[ ]+9006[ ]+c.add[ ]+zero,ra +[ ]+a:[ ]+00500013[ ]+li[ ]+zero,5 +[ ]+e:[ ]+00006037[ ]+lui[ ]+zero,0x6 +[ ]+12:[ ]+00709013[ ]+slli[ ]+zero,ra,0x7 +[ ]+16:[ ]+00008013[ ]+mv[ ]+zero,ra +[ ]+1a:[ ]+00100033[ ]+add[ ]+zero,zero,ra +#... diff --git a/gas/testsuite/gas/riscv/c-zero-reg.s b/gas/testsuite/gas/riscv/c-zero-reg.s new file mode 100644 index 0000000..414c8a4 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-zero-reg.s @@ -0,0 +1,13 @@ + .option rvc + # These are hints. + c.li x0, 1 + c.lui x0, 2 + c.slli x0, 3 + c.mv x0, x1 + c.add x0, x1 + # Don't let these compress to hints. + li x0, 5 + lui x0, 6 + slli x0, x1, 7 + mv x0, x1 + add x0, x0, x1 -- cgit v1.1