From 0f873fd58b51a2906f31bb445ab685da04a1be23 Mon Sep 17 00:00:00 2001 From: Peter Bergner Date: Fri, 1 Dec 2017 11:20:15 -0600 Subject: Use consistent types for holding instructions, instruction masks, etc. include/ * opcode/ppc.h (PPC_INT_FMT): Define. (struct powerpc_opcode) : Update type. (struct powerpc_opcode) : Likewise. (struct powerpc_opcode) : Likewise. (struct powerpc_opcode) : Likewise. (struct powerpc_opcode) : Likewise. (ppc_optional_operand_value): Likewise. gas/ * config/tc-ppc.c (last_insn): Update type. (insn_validate) : Likewise. (ppc_setup_opcodes) : Likewise. : Update types and printf format specifiers. (ppc_insert_operand): Update return and argument types and remove unneeded type casts. : Update type. (md_assemble): Remove unneeded type casts. : Update type. opcodes/ * opcodes/ppc-dis.c (disassemble_init_powerpc): Fix white space. (operand_value_powerpc): Update return and argument type. : Update type. (skip_optional_operands): Update argument type. (lookup_powerpc): Likewise. (lookup_vle): Likewise. : Update type. (lookup_spe2): Update argument type. : Update type. (print_insn_powerpc) : Update type. Use PPC_INT_FMT for printing instructions and operands. * opcodes/ppc-opc.c (insert_arx, extract_arx, insert_ary, extract_ary, insert_rx, extract_rx, insert_ry, extract_ry, insert_bat, extract_bat, insert_bba, extract_bba, insert_bdm, extract_bdm, insert_bdp, extract_bdp, valid_bo_pre_v2, valid_bo_post_v2, valid_bo, insert_bo, extract_bo, insert_boe, extract_boe, insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_fxm, extract_fxm, insert_li20, extract_li20, insert_ls, extract_ls, insert_esync, extract_esync, insert_mbe, extract_mbe, insert_mb6, extract_mb6, extract_nb, insert_nbi, insert_nsi, extract_nsi, insert_ral, extract_ral, insert_ram, extract_ram, insert_raq, extract_raq, insert_ras, extract_ras, insert_rbs, extract_rbs, insert_rbx, extract_rbx, insert_sci8, extract_sci8, insert_sci8n, extract_sci8n, insert_sd4h, extract_sd4h, insert_sd4w, extract_sd4w, insert_oimm, extract_oimm, insert_sh6, extract_sh6, insert_spr, extract_spr, insert_sprg, extract_sprg, insert_tbr, extract_tbr, insert_xt6, extract_xt6, insert_xtq6, extract_xtq6, insert_xa6, extract_xa6, insert_xb6, extract_xb6, insert_xb6s, extract_xb6s, insert_xc6, extract_xc6, insert_dm, extract_dm, insert_vlesi, extract_vlesi, insert_vlensi, extract_vlensi, insert_vleui, extract_vleui, insert_vleil, extract_vleil, insert_evuimm1_ex0, extract_evuimm1_ex0, insert_evuimm2_ex0, extract_evuimm2_ex0, insert_evuimm4_ex0, extract_evuimm4_ex0, insert_evuimm8_ex0, extract_evuimm8_ex0, insert_evuimm_lt8, extract_evuimm_lt8, insert_evuimm_lt16, extract_evuimm_lt16, insert_rD_rS_even, extract_rD_rS_even, insert_off_lsp, extract_off_lsp, insert_off_spe2, extract_off_spe2, insert_Ddd, extract_Ddd): Update types. (OP, OPTO, OPL, OPVUP, OPVUPRT, A, AFRALFRC_MASK, B, BD8, BD8IO, BD15, BD24, BBO, Y_MASK , AT1_MASK, AT2_MASK, BBOCB, C_LK, C, CTX, UCTX, DX, EVSEL, IA16, I16A, I16L, IM7, LI20, MME, MD, MDS, SC, SC_MASK, SCI8, SCI8BF, SD4, SE_IM5, SE_R, SE_RR, VX, VX_LSP, VX_RA_CONST, VX_RB_CONST, VX_SPE_CRFD, VX_SPE2_CLR, VX_SPE2_SPLATB, VX_SPE2_OCTET, VX_SPE2_DDHH, VX_SPE2_HH, VX_SPE2_EVMAR, VX_SPE2_EVMAR_MASK, VXA, VXR, VXASH, X, EX, XX2, XX3, XX3RC, XX4, Z, XWRA_MASK, XLRT_MASK, XRLARB_MASK, XLRAND_MASK, XRTLRA_MASK, XRTLRARB_MASK, XRTARARB_MASK, XRTBFRARB_MASK, XOPL, XOPL2, XRCL, XRT, XRTRA, XCMP_MASK, XCMPL_MASK, XTO, XTLB, XSYNC, XEH_MASK, XDSS, XFL, XISEL, XL, XLO, XLYLK, XLOCB, XMBAR, XO, XOPS, XS, XFXM, XSPR, XUC, XW, APU): Update types in casts. --- gas/ChangeLog | 12 ++++++++++ gas/config/tc-ppc.c | 64 ++++++++++++++++++++++++++--------------------------- 2 files changed, 44 insertions(+), 32 deletions(-) (limited to 'gas') diff --git a/gas/ChangeLog b/gas/ChangeLog index 0a898f3..19e13d6 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,15 @@ +2017-12-01 Peter Bergner + + * config/tc-ppc.c (last_insn): Update type. + (insn_validate) : Likewise. + (ppc_setup_opcodes) : Likewise. + : Update types and printf format specifiers. + (ppc_insert_operand): Update return and argument types and remove + unneeded type casts. + : Update type. + (md_assemble): Remove unneeded type casts. + : Update type. + 2017-11-29 Jan Beulich * config/tc-i386.c (enum i386_error): Remove try_vector_disp8. diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 7118b71..d4f3d60 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -217,7 +217,7 @@ static enum { /* Warn on emitting data to code sections. */ int warn_476; -unsigned long last_insn; +uint64_t last_insn; segT last_seg; subsegT last_subseg; @@ -1497,7 +1497,7 @@ static bfd_boolean insn_validate (const struct powerpc_opcode *op) { const unsigned char *o; - unsigned long omask = op->mask; + uint64_t omask = op->mask; /* The mask had better not trim off opcode bits. */ if ((op->opcode & omask) != op->opcode) @@ -1519,7 +1519,7 @@ insn_validate (const struct powerpc_opcode *op) const struct powerpc_operand *operand = &powerpc_operands[*o]; if (operand->shift != (int) PPC_OPSHIFT_INV) { - unsigned long mask; + uint64_t mask; if (operand->shift >= 0) mask = operand->bitm << operand->shift; @@ -1570,8 +1570,8 @@ ppc_setup_opcodes (void) all the 1's in the mask are contiguous. */ for (i = 0; i < num_powerpc_operands; ++i) { - unsigned long mask = powerpc_operands[i].bitm; - unsigned long right_bit; + uint64_t mask = powerpc_operands[i].bitm; + uint64_t right_bit; unsigned int j; right_bit = mask & -mask; @@ -1604,10 +1604,10 @@ ppc_setup_opcodes (void) int new_opcode = PPC_OP (op[0].opcode); #ifdef PRINT_OPCODE_TABLE - printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", + printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", op->name, (unsigned int) (op - powerpc_opcodes), - (unsigned int) new_opcode, (unsigned int) op->opcode, - (unsigned int) op->mask, (unsigned long long) op->flags); + (unsigned int) new_opcode, (unsigned long long) op->opcode, + (unsigned long long) op->mask, (unsigned long long) op->flags); #endif /* The major opcodes had better be sorted. Code in the @@ -1669,10 +1669,10 @@ ppc_setup_opcodes (void) new_seg = VLE_OP_TO_SEG (new_seg); #ifdef PRINT_OPCODE_TABLE - printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", + printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", op->name, (unsigned int) (op - powerpc_opcodes), - (unsigned int) new_seg, (unsigned int) op->opcode, - (unsigned int) op->mask, (unsigned long long) op->flags); + (unsigned int) new_seg, (unsigned long long) op->opcode, + (unsigned long long) op->mask, (unsigned long long) op->flags); #endif /* The major opcodes had better be sorted. Code in the disassembler assumes the insns are sorted according to @@ -1884,15 +1884,15 @@ ppc_cleanup (void) /* Insert an operand value into an instruction. */ -static unsigned long -ppc_insert_operand (unsigned long insn, +static uint64_t +ppc_insert_operand (uint64_t insn, const struct powerpc_operand *operand, - offsetT val, + int64_t val, ppc_cpu_t cpu, const char *file, unsigned int line) { - long min, max, right; + int64_t min, max, right; max = operand->bitm; right = max & -max; @@ -1921,7 +1921,7 @@ ppc_insert_operand (unsigned long insn, if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) { - long tmp = min; + int64_t tmp = min; min = -max; max = -tmp; } @@ -1934,18 +1934,18 @@ ppc_insert_operand (unsigned long insn, sign extend the 32-bit value to 64 bits if so doing makes the value valid. */ if (val > max - && (offsetT) (val - 0x80000000 - 0x80000000) >= min - && (offsetT) (val - 0x80000000 - 0x80000000) <= max - && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) - val = val - 0x80000000 - 0x80000000; + && (val - (1LL << 32)) >= min + && (val - (1LL << 32)) <= max + && ((val - (1LL << 32)) & (right - 1)) == 0) + val = val - (1LL << 32); /* Similarly, people write expressions like ~(1<<15), and expect this to be OK for a 32-bit unsigned value. */ else if (val < min - && (offsetT) (val + 0x80000000 + 0x80000000) >= min - && (offsetT) (val + 0x80000000 + 0x80000000) <= max - && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) - val = val + 0x80000000 + 0x80000000; + && (val + (1LL << 32)) >= min + && (val + (1LL << 32)) <= max + && ((val + (1LL << 32)) & (right - 1)) == 0) + val = val + (1LL << 32); else if (val < min || val > max @@ -1958,14 +1958,14 @@ ppc_insert_operand (unsigned long insn, const char *errmsg; errmsg = NULL; - insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); + insn = (*operand->insert) (insn, val, cpu, &errmsg); if (errmsg != (const char *) NULL) as_bad_where (file, line, "%s", errmsg); } else if (operand->shift >= 0) - insn |= ((long) val & operand->bitm) << operand->shift; + insn |= (val & operand->bitm) << operand->shift; else - insn |= ((long) val & operand->bitm) >> -operand->shift; + insn |= (val & operand->bitm) >> -operand->shift; return insn; } @@ -2739,7 +2739,7 @@ md_assemble (char *str) { char *s; const struct powerpc_opcode *opcode; - unsigned long insn; + uint64_t insn; const unsigned char *opindex_ptr; int skip_optional; int need_paren; @@ -2868,7 +2868,7 @@ md_assemble (char *str) && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64) && skip_optional) { - long val = ppc_optional_operand_value (operand); + int64_t val = ppc_optional_operand_value (operand); if (operand->insert) { insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg); @@ -2876,9 +2876,9 @@ md_assemble (char *str) as_bad ("%s", errmsg); } else if (operand->shift >= 0) - insn |= ((long) val & operand->bitm) << operand->shift; + insn |= (val & operand->bitm) << operand->shift; else - insn |= ((long) val & operand->bitm) >> -operand->shift; + insn |= (val & operand->bitm) >> -operand->shift; if ((operand->flags & PPC_OPERAND_NEXT) != 0) next_opindex = *opindex_ptr + 1; @@ -3219,7 +3219,7 @@ md_assemble (char *str) /* If VLE-mode convert LO/HI/HA relocations. */ if (opcode->flags & PPC_OPCODE_VLE) { - int tmp_insn = insn & opcode->mask; + uint64_t tmp_insn = insn & opcode->mask; int use_a_reloc = (tmp_insn == E_OR2I_INSN || tmp_insn == E_AND2I_DOT_INSN -- cgit v1.1