From 031254f2111f945ce6a1b8827e1a58ed7141fefe Mon Sep 17 00:00:00 2001 From: Andre Vieira Date: Mon, 15 Apr 2019 10:54:42 +0100 Subject: [binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLI The patch is straightforward, it does the following: - support the new Tag_CPU_arch build attribute value, ie.: + declare the new value + update all the asserts forcing logic to be reviewed for new architectures + create a corresponding bfd_mach_arm_8_1M_MAIN enumerator in bfd and add mapping from Tag_CPU_arch to it + teach readelf about new Tag_CPU_arch value - declare armv8.1-m.main as a supported architecture value - define Armv8.1-M Mainline in terms of feature bits available - tell objdump mapping from bfd_mach_arm_8_1M_MAIN enumerator to feature bits available - update architecture-specific logic in gas and bfd guarded by the asserts mentioned above. - tests for all the above ChangeLog entries are as follows: *** bfd/ChangeLog *** 2019-04-15 Thomas Preud'homme * archures.c (bfd_mach_arm_8_1M_MAIN): Define. * bfd-in2.h: Regenerate. * cpu-arm.c (arch_info_struct): Add entry for Armv8.1-M Mainline. * elf32-arm.c (using_thumb_only): Return true for Armv8.1-M Mainline and update assert. (using_thumb2): Likewise. (using_thumb2_bl): Update assert. (arch_has_arm_nop): Likewise. (bfd_arm_get_mach_from_attributes): Add case for Armv8.1-M Mainline. (tag_cpu_arch_combine): Add logic for Armv8.1-M Mainline merging. *** binutils/ChangeLog *** 2019-04-15 Thomas Preud'homme * readelf.c (arm_attr_tag_CPU_arch): Add entry for Armv8.1-M Mainline. *** gas/ChangeLog *** 2019-04-15 Thomas Preud'homme * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline Tag_CPU_arch build attribute value. Reindent. (get_aeabi_cpu_arch_from_fset): Update assert. (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. *** include/ChangeLog *** 2019-04-15 Thomas Preud'homme * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro. (MAX_TAG_CPU_ARCH): Set value to above macro. * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro. (ARM_AEXT_V8_1M_MAIN): Likewise. (ARM_AEXT2_V8_1M_MAIN): Likewise. (ARM_ARCH_V8_1M_MAIN): Likewise. *** ld/ChangeLog *** 2019-04-15 Thomas Preud'homme * testsuite/ld-arm/attr-merge-13.attr: New test. * testsuite/ld-arm/attr-merge-13a.s: New test. * testsuite/ld-arm/attr-merge-13b.s: New test. *** opcodes/ChangeLog *** 2019-04-15 Thomas Preud'homme * arm-dis.c (select_arm_features): Add logic for Armv8.1-M Mainline. --- gas/ChangeLog | 8 ++ gas/config/tc-arm.c | 92 ++++++++++++----------- gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d | 13 ++++ 3 files changed, 68 insertions(+), 45 deletions(-) create mode 100644 gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d (limited to 'gas') diff --git a/gas/ChangeLog b/gas/ChangeLog index 82fa9b2..bb30f84 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2019-04-15 Thomas Preud'homme + + * config/tc-arm.c (cpu_arch_ver): Add entry for Armv8.1-M Mainline + Tag_CPU_arch build attribute value. Reindent. + (get_aeabi_cpu_arch_from_fset): Update assert. + (aeabi_set_public_attributes): Update assert for Tag_DIV_use logic. + * testsuite/gas/arm/attr-march-armv8_1-m.main.d: New test. + 2019-04-09 Matthew Fortune * config/tc-mips.c (mips_cpu_info_table): Add i6500. Update diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 4218d05..4f96066 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -26570,6 +26570,7 @@ static const struct arm_arch_option_table arm_archs[] = ARM_ARCH_OPT ("armv8-m.base", ARM_ARCH_V8M_BASE, FPU_ARCH_VFP), ARM_ARCH_OPT2 ("armv8-m.main", ARM_ARCH_V8M_MAIN, FPU_ARCH_VFP, armv8m_main), + ARM_ARCH_OPT ("armv8.1-m.main", ARM_ARCH_V8_1M_MAIN, FPU_ARCH_VFP), ARM_ARCH_OPT2 ("armv8-a", ARM_ARCH_V8A, FPU_ARCH_VFP, armv8a), ARM_ARCH_OPT2 ("armv8.1-a", ARM_ARCH_V8_1A, FPU_ARCH_VFP, armv81a), ARM_ARCH_OPT2 ("armv8.2-a", ARM_ARCH_V8_2A, FPU_ARCH_VFP, armv82a), @@ -27284,30 +27285,30 @@ typedef struct stable when new architectures are added. */ static const cpu_arch_ver_table cpu_arch_ver[] = { - {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V1}, - {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V2}, - {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V2S}, - {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V3}, - {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V3M}, - {TAG_CPU_ARCH_V4, ARM_ARCH_V4xM}, - {TAG_CPU_ARCH_V4, ARM_ARCH_V4}, - {TAG_CPU_ARCH_V4T, ARM_ARCH_V4TxM}, - {TAG_CPU_ARCH_V4T, ARM_ARCH_V4T}, - {TAG_CPU_ARCH_V5T, ARM_ARCH_V5xM}, - {TAG_CPU_ARCH_V5T, ARM_ARCH_V5}, - {TAG_CPU_ARCH_V5T, ARM_ARCH_V5TxM}, - {TAG_CPU_ARCH_V5T, ARM_ARCH_V5T}, - {TAG_CPU_ARCH_V5TE, ARM_ARCH_V5TExP}, - {TAG_CPU_ARCH_V5TE, ARM_ARCH_V5TE}, - {TAG_CPU_ARCH_V5TEJ, ARM_ARCH_V5TEJ}, - {TAG_CPU_ARCH_V6, ARM_ARCH_V6}, - {TAG_CPU_ARCH_V6KZ, ARM_ARCH_V6Z}, - {TAG_CPU_ARCH_V6KZ, ARM_ARCH_V6KZ}, - {TAG_CPU_ARCH_V6K, ARM_ARCH_V6K}, - {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6T2}, - {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6KT2}, - {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6ZT2}, - {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6KZT2}, + {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V1}, + {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V2}, + {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V2S}, + {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V3}, + {TAG_CPU_ARCH_PRE_V4, ARM_ARCH_V3M}, + {TAG_CPU_ARCH_V4, ARM_ARCH_V4xM}, + {TAG_CPU_ARCH_V4, ARM_ARCH_V4}, + {TAG_CPU_ARCH_V4T, ARM_ARCH_V4TxM}, + {TAG_CPU_ARCH_V4T, ARM_ARCH_V4T}, + {TAG_CPU_ARCH_V5T, ARM_ARCH_V5xM}, + {TAG_CPU_ARCH_V5T, ARM_ARCH_V5}, + {TAG_CPU_ARCH_V5T, ARM_ARCH_V5TxM}, + {TAG_CPU_ARCH_V5T, ARM_ARCH_V5T}, + {TAG_CPU_ARCH_V5TE, ARM_ARCH_V5TExP}, + {TAG_CPU_ARCH_V5TE, ARM_ARCH_V5TE}, + {TAG_CPU_ARCH_V5TEJ, ARM_ARCH_V5TEJ}, + {TAG_CPU_ARCH_V6, ARM_ARCH_V6}, + {TAG_CPU_ARCH_V6KZ, ARM_ARCH_V6Z}, + {TAG_CPU_ARCH_V6KZ, ARM_ARCH_V6KZ}, + {TAG_CPU_ARCH_V6K, ARM_ARCH_V6K}, + {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6T2}, + {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6KT2}, + {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6ZT2}, + {TAG_CPU_ARCH_V6T2, ARM_ARCH_V6KZT2}, /* When assembling a file with only ARMv6-M or ARMv6S-M instruction, GNU as always selected build attributes to match those of ARMv6-M @@ -27316,25 +27317,26 @@ static const cpu_arch_ver_table cpu_arch_ver[] = would be selected when fully respecting chronology of architectures. It is thus necessary to make a special case of ARMv6-M and ARMv6S-M and move them before ARMv7 architectures. */ - {TAG_CPU_ARCH_V6_M, ARM_ARCH_V6M}, - {TAG_CPU_ARCH_V6S_M, ARM_ARCH_V6SM}, - - {TAG_CPU_ARCH_V7, ARM_ARCH_V7}, - {TAG_CPU_ARCH_V7, ARM_ARCH_V7A}, - {TAG_CPU_ARCH_V7, ARM_ARCH_V7R}, - {TAG_CPU_ARCH_V7, ARM_ARCH_V7M}, - {TAG_CPU_ARCH_V7, ARM_ARCH_V7VE}, - {TAG_CPU_ARCH_V7E_M, ARM_ARCH_V7EM}, - {TAG_CPU_ARCH_V8, ARM_ARCH_V8A}, - {TAG_CPU_ARCH_V8, ARM_ARCH_V8_1A}, - {TAG_CPU_ARCH_V8, ARM_ARCH_V8_2A}, - {TAG_CPU_ARCH_V8, ARM_ARCH_V8_3A}, - {TAG_CPU_ARCH_V8M_BASE, ARM_ARCH_V8M_BASE}, - {TAG_CPU_ARCH_V8M_MAIN, ARM_ARCH_V8M_MAIN}, - {TAG_CPU_ARCH_V8R, ARM_ARCH_V8R}, - {TAG_CPU_ARCH_V8, ARM_ARCH_V8_4A}, - {TAG_CPU_ARCH_V8, ARM_ARCH_V8_5A}, - {-1, ARM_ARCH_NONE} + {TAG_CPU_ARCH_V6_M, ARM_ARCH_V6M}, + {TAG_CPU_ARCH_V6S_M, ARM_ARCH_V6SM}, + + {TAG_CPU_ARCH_V7, ARM_ARCH_V7}, + {TAG_CPU_ARCH_V7, ARM_ARCH_V7A}, + {TAG_CPU_ARCH_V7, ARM_ARCH_V7R}, + {TAG_CPU_ARCH_V7, ARM_ARCH_V7M}, + {TAG_CPU_ARCH_V7, ARM_ARCH_V7VE}, + {TAG_CPU_ARCH_V7E_M, ARM_ARCH_V7EM}, + {TAG_CPU_ARCH_V8, ARM_ARCH_V8A}, + {TAG_CPU_ARCH_V8, ARM_ARCH_V8_1A}, + {TAG_CPU_ARCH_V8, ARM_ARCH_V8_2A}, + {TAG_CPU_ARCH_V8, ARM_ARCH_V8_3A}, + {TAG_CPU_ARCH_V8M_BASE, ARM_ARCH_V8M_BASE}, + {TAG_CPU_ARCH_V8M_MAIN, ARM_ARCH_V8M_MAIN}, + {TAG_CPU_ARCH_V8R, ARM_ARCH_V8R}, + {TAG_CPU_ARCH_V8, ARM_ARCH_V8_4A}, + {TAG_CPU_ARCH_V8, ARM_ARCH_V8_5A}, + {TAG_CPU_ARCH_V8_1M_MAIN, ARM_ARCH_V8_1M_MAIN}, + {-1, ARM_ARCH_NONE} }; /* Set an attribute if it has not already been set by the user. */ @@ -27417,7 +27419,7 @@ get_aeabi_cpu_arch_from_fset (const arm_feature_set *arch_ext_fset, if (ARM_FEATURE_EQUAL (*arch_ext_fset, arm_arch_any)) { /* Force revisiting of decision for each new architecture. */ - gas_assert (MAX_TAG_CPU_ARCH <= TAG_CPU_ARCH_V8M_MAIN); + gas_assert (MAX_TAG_CPU_ARCH <= TAG_CPU_ARCH_V8_1M_MAIN); *profile = 'A'; return TAG_CPU_ARCH_V8; } @@ -27688,7 +27690,7 @@ aeabi_set_public_attributes (void) by the base architecture. For new architectures we will have to check these tests. */ - gas_assert (arch <= TAG_CPU_ARCH_V8M_MAIN); + gas_assert (arch <= TAG_CPU_ARCH_V8_1M_MAIN); if (ARM_CPU_HAS_FEATURE (flags, arm_ext_v8) || ARM_CPU_HAS_FEATURE (flags, arm_ext_v8m)) aeabi_set_attribute_int (Tag_DIV_use, 0); diff --git a/gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d b/gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d new file mode 100644 index 0000000..acae2e3 --- /dev/null +++ b/gas/testsuite/gas/arm/attr-march-armv8_1-m.main.d @@ -0,0 +1,13 @@ +# name: attributes for -march=armv8.1-m.main +# source: blank.s +# as: -march=armv8.1-m.main +# readelf: -A +# This test is only valid on EABI based ports. +# target: *-*-*eabi* *-*-nacl* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "8.1-M.MAIN" + Tag_CPU_arch: v8.1-M.mainline + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Yes -- cgit v1.1