From b437d035ddf4e4c0c566c577ee059790ed28ad9b Mon Sep 17 00:00:00 2001 From: Andrew Burgess Date: Tue, 27 Sep 2016 12:06:01 +0100 Subject: arc/nps400: Validate address type operands correctly When we match against an address type operand within an instruction it is important that we match exactly the right address type operand early on, during the opcode selection phase. If we wait until the operand insertion phase to check that we have the correct address operand, then it is too late to select an alternative opcode. This becomes important only when we have multiple opcodes with the same mnemonic, and operand lists that differ only in the type of the address operands. This commit fixes this issue, and adds some example instructions that require this issue to be fixed (the instructions are identical except for the address type operand). gas/ChangeLog: * config/tc-arc.c (find_opcode_match): Use insert function to validate matching address type operands. * testsuite/gas/arc/nps400-10.d: New file. * testsuite/gas/arc/nps400-10.s: New file. opcodes/ChangeLog: * arc-opc.c (arc_flag_operands): Add F_DI14. (arc_flag_classes): Add C_DI14. * arc-nps400-tbl.h: Add new exc instructions. --- gas/testsuite/gas/arc/nps400-10.d | 24 ++++++++++++++++++++++++ gas/testsuite/gas/arc/nps400-10.s | 22 ++++++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 gas/testsuite/gas/arc/nps400-10.d create mode 100644 gas/testsuite/gas/arc/nps400-10.s (limited to 'gas/testsuite') diff --git a/gas/testsuite/gas/arc/nps400-10.d b/gas/testsuite/gas/arc/nps400-10.d new file mode 100644 index 0000000..44a6cfd --- /dev/null +++ b/gas/testsuite/gas/arc/nps400-10.d @@ -0,0 +1,24 @@ +#as: -mcpu=arc700 -mnps400 +#objdump: -dr + +.*: +file format .*arc.* + +Disassembly of section \.text: + +[0-9a-f]+ <.*>: + 0: 4846 0c21 exc r0,r0,\[xa:r2\] + 4: 4926 0c61 exc r1,r1,\[sd:r1\] + 8: 4a66 0c81 exc r2,r2,\[xd:r3\] + c: 4b26 0c01 exc r3,r3,\[r1\] + 10: 4c96 4c21 exc\.di\.f r12,r12,\[xa:r12\] + 14: 4eb6 4c61 exc\.di\.f r14,r14,\[sd:r13\] + 18: 4dd6 4c81 exc\.di\.f r13,r13,\[xd:r14\] + 1c: 4ff6 4c01 exc\.di\.f r15,r15,\[r15\] + 20: 4c16 0c21 exc\.f r12,r12,\[xa:r0\] + 24: 4e36 0c61 exc\.f r14,r14,\[sd:r1\] + 28: 4d16 0c81 exc\.f r13,r13,\[xd:r0\] + 2c: 4f56 0c01 exc\.f r15,r15,\[r2\] + 30: 4c86 4c21 exc\.di r12,r12,\[xa:r12\] + 34: 4ec6 4c61 exc\.di r14,r14,\[sd:r14\] + 38: 4da6 4c81 exc\.di r13,r13,\[xd:r13\] + 3c: 4fe6 4c01 exc\.di r15,r15,\[r15\] diff --git a/gas/testsuite/gas/arc/nps400-10.s b/gas/testsuite/gas/arc/nps400-10.s new file mode 100644 index 0000000..18760c8 --- /dev/null +++ b/gas/testsuite/gas/arc/nps400-10.s @@ -0,0 +1,22 @@ + .text + + ;; Atomic Operations: exc + exc r0,r0,[xa:r2] + exc r1,r1,[sd:r1] + exc r2,r2,[xd:r3] + exc r3,r3,[r1] + + exc.di.f r12,r12,[xa:r12] + exc.di.f r14,r14,[sd:r13] + exc.di.f r13,r13,[xd:r14] + exc.di.f r15,r15,[r15] + + exc.f r12,r12,[xa:r0] + exc.f r14,r14,[sd:r1] + exc.f r13,r13,[xd:r0] + exc.f r15,r15,[r2] + + exc.di r12,r12,[xa:r12] + exc.di r14,r14,[sd:r14] + exc.di r13,r13,[xd:r13] + exc.di r15,r15,[r15] -- cgit v1.1