From df6780137dc9d832db8c5525ecc760acdbcde5c9 Mon Sep 17 00:00:00 2001 From: Matthew Malcomson Date: Thu, 7 Nov 2019 16:38:59 +0000 Subject: [binutils][aarch64] Bfloat16 enablement [2/X] Hi, This patch is part of a series that adds support for Armv8.6-A (Matrix Multiply and BFloat16 extensions) to binutils. This patch introduces the following BFloat16 instructions to the aarch64 backend: bfdot, bfmmla, bfcvt, bfcvtnt, bfmlal[t/b], bfcvtn2. Committed on behalf of Mihail Ionescu. gas/ChangeLog: 2019-11-07 Mihail Ionescu 2019-11-07 Matthew Malcomson * config/tc-aarch64.c (vectype_to_qualifier): Special case the S_2H operand qualifier. * doc/c-aarch64.texi: Document bf16 and bf16mmla4 extensions. * testsuite/gas/aarch64/bfloat16.d: New test. * testsuite/gas/aarch64/bfloat16.s: New test. * testsuite/gas/aarch64/illegal-bfloat16.d: New test. * testsuite/gas/aarch64/illegal-bfloat16.l: New test. * testsuite/gas/aarch64/illegal-bfloat16.s: New test. * testsuite/gas/aarch64/sve-bfloat-movprfx.s: New test. * testsuite/gas/aarch64/sve-bfloat-movprfx.d: New test. include/ChangeLog: 2019-11-07 Mihail Ionescu 2019-11-07 Matthew Malcomson * opcode/aarch64.h (AARCH64_FEATURE_BFLOAT16): New feature macros. (AARCH64_ARCH_V8_6): Include BFloat16 feature macros. (enum aarch64_opnd_qualifier): Introduce new operand qualifier AARCH64_OPND_QLF_S_2H. (enum aarch64_insn_class): Introduce new class "bfloat16". (BFLOAT16_SVE_INSNC): New feature set for bfloat16 instructions to support the movprfx constraint. opcodes/ChangeLog: 2019-11-07 Mihail Ionescu 2019-11-07 Matthew Malcomson * aarch64-asm.c (aarch64_ins_reglane): Use AARCH64_OPND_QLF_S_2H in reglane special case. * aarch64-dis-2.c (aarch64_opcode_lookup_1, aarch64_find_next_opcode): Account for new instructions. * aarch64-dis.c (aarch64_ext_reglane): Use AARCH64_OPND_QLF_S_2H in reglane special case. * aarch64-opc.c (struct operand_qualifier_data): Add data for new AARCH64_OPND_QLF_S_2H qualifier. * aarch64-tbl.h (QL_BFDOT QL_BFDOT64, QL_BFDOT64I, QL_BFMMLA2, QL_BFCVT64, QL_BFCVTN64, QL_BFCVTN2_64): New qualifiers. (aarch64_feature_bfloat16, aarch64_feature_bfloat16_sve, aarch64_feature_bfloat16_bfmmla4): New feature sets. (BFLOAT_SVE, BFLOAT): New feature set macros. (BFLOAT_SVE_INSN, BFLOAT_BFMMLA4_INSN, BFLOAT_INSN): New macros to define BFloat16 instructions. (aarch64_opcode_table): Define new instructions bfdot, bfmmla, bfcvt, bfcvtnt, bfdot, bfdot, bfcvtn, bfmlal[b/t] bfcvtn2, bfcvt. Regression tested on aarch64-elf. Is it ok for trunk? Regards, Mihail --- gas/doc/c-aarch64.texi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'gas/doc') diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index a83a859..4cb9487 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -144,6 +144,8 @@ automatically cause those extensions to be disabled. @multitable @columnfractions .12 .17 .17 .54 @headitem Extension @tab Minimum Architecture @tab Enabled by default @tab Description +@item @code{bf16} @tab ARMv8.2-A @tab ARMv8.6-A or later + @tab Enable BFloat16 extension. @item @code{compnum} @tab ARMv8.2-A @tab ARMv8.3-A or later @tab Enable the complex number SIMD extensions. This implies @code{fp16} and @code{simd}. -- cgit v1.1