From 40b365969f7fd035dfa0c6ffe729fd2501b5f11d Mon Sep 17 00:00:00 2001 From: Joseph Myers Date: Thu, 25 Mar 2010 21:12:36 +0000 Subject: bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New. --- gas/doc/as.texinfo | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 52 insertions(+), 3 deletions(-) (limited to 'gas/doc/as.texinfo') diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index f127a3f..531c157 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -1,6 +1,6 @@ \input texinfo @c -*-Texinfo-*- @c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, -@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 +@c 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 @c Free Software Foundation, Inc. @c UPDATE!! On future updates-- @c (1) check for new machine-dep cmdline options in @@ -104,7 +104,7 @@ This file documents the GNU Assembler "@value{AS}". @c man begin COPYRIGHT Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002, -2006, 2007, 2008, 2009 Free Software Foundation, Inc. +2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 @@ -154,7 +154,7 @@ done. @vskip 0pt plus 1filll Copyright @copyright{} 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002, -2006, 2007, 2008, 2009 Free Software Foundation, Inc. +2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.3 @@ -472,6 +472,13 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. [@b{-merrors-to-file} @var{}|@b{-me} @var{}] @end ifset +@ifset TIC6X + +@emph{Target TIC6X options:} + [@b{-march=@var{arch}}] [@b{-matomic}|@b{-mno-atomic}] + [@b{-mbig-endian}|@b{-mlittle-endian}] +@end ifset + @ifset Z80 @emph{Target Z80 options:} @@ -1245,6 +1252,38 @@ but evaluates to zero. @end table @end ifset +@ifset TIC6X +The following options are available when @value{AS} is configured for a +TMS320C6000 processor. + +@table @gcctabopt +@item -march=@var{arch} +Enable (only) instructions from architecture @var{arch}. By default, +all instructions are permitted. + +The following values of @var{arch} are accepted: @code{c62x}, +@code{c64x}, @code{c64x+}, @code{c67x}, @code{c67x+}, @code{c674x}. + +@item -matomic +@itemx -mno-atomic +Enable or disable the optional C64x+ atomic operation instructions. +By default, they are enabled if no @option{-march} option is given, or +if an architecture is specified with @option{-march} that implies +these instructions are present (currently, there are no such +architectures); they are disabled if an architecture is specified with +@option{-march} on which the instructions are optional or not +present. This option overrides such a default from the architecture, +independent of the order in which the @option{-march} or +@option{-matomic} or @option{-mno-atomic} options are passed. + +@item -mbig-endian +@itemx -mlittle-endian +Generate code for the specified endianness. The default is +little-endian. +@end table + +@end ifset + @ifset XTENSA The following options are available when @value{AS} is configured for an Xtensa processor. @@ -2315,6 +2354,9 @@ is considered a comment and is ignored. The line comment character is @ifset RX @samp{#} on the RX; @end ifset +@ifset TIC6X +@samp{;} on the TMS320C6X; +@end ifset @ifset VAX @samp{#} on the Vax; @end ifset @@ -6862,6 +6904,9 @@ subject, see the hardware manufacturer's manual. @ifset TIC54X * TIC54X-Dependent:: TI TMS320C54x Dependent Features @end ifset +@ifset TIC6X +* TIC6X-Dependent :: TI TMS320C6x Dependent Features +@end ifset @ifset V850 * V850-Dependent:: V850 Dependent Features @end ifset @@ -7053,6 +7098,10 @@ family. @include c-tic54x.texi @end ifset +@ifset TIC6X +@include c-tic6x.texi +@end ifset + @ifset Z80 @include c-z80.texi @end ifset -- cgit v1.1