From 75c0a438994f00240ecd1baca3e3c11cc3b219e5 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Mon, 7 May 2018 09:57:06 -0700 Subject: x86: Replace AddrPrefixOp0 with AddrPrefixOpReg This patch replaces AddrPrefixOp0 with AddrPrefixOpReg to indicate that the size of register operand is controlled by the address size prefix. This will be used by Intel MOVDIRI and MOVDIR64B instructions later. gas/ * config/tc-i386.c (process_suffix): Check addrprefixopreg instead of addrprefixop0. opcodes/ * i386-gen.c (opcode_modifiers): Replace AddrPrefixOp0 with AddrPrefixOpReg. * i386-opc.h (AddrPrefixOp0): Renamed to ... (AddrPrefixOpReg): This. (i386_opcode_modifier): Rename addrprefixop0 to addrprefixopreg. * i386-opc.tbl: Replace AddrPrefixOp0 with AddrPrefixOpReg. --- gas/config/tc-i386.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'gas/config') diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index cd53fa46..b4c93a2 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -5997,14 +5997,18 @@ process_suffix (void) /* Now select between word & dword operations via the operand size prefix, except for instructions that will ignore this prefix anyway. */ - if (i.tm.opcode_modifier.addrprefixop0) + if (i.reg_operands > 0 + && i.types[0].bitfield.reg + && i.tm.opcode_modifier.addrprefixopreg + && (i.tm.opcode_modifier.immext + || i.operands == 1)) { /* The address size override prefix changes the size of the first operand. */ if ((flag_code == CODE_32BIT - && i.op->regs[0].reg_type.bitfield.word) + && i.op[0].regs->reg_type.bitfield.word) || (flag_code != CODE_32BIT - && i.op->regs[0].reg_type.bitfield.dword)) + && i.op[0].regs->reg_type.bitfield.dword)) if (!add_prefix (ADDR_PREFIX_OPCODE)) return 0; } -- cgit v1.1