From 199cfcc4754cea6f4c42dcbb8d8d5161f5b2d186 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 30 Mar 2023 11:09:09 +0100 Subject: aarch64: Add a aarch64_cpu_supports_inst_p helper Quite a lot of SME2 instructions have an opcode bit that selects between 32-bit and 64-bit forms of an instruction, with the 32-bit forms being part of base SME2 and with the 64-bit forms being part of an optional extension. It's nevertheless useful to have a single opcode entry for both forms since (a) that matches the ISA definition and (b) it tends to improve error reporting. This patch therefore adds a libopcodes function called aarch64_cpu_supports_inst_p that tests whether the target supports a particular instruction. In future it will depend on internal libopcodes routines. --- gas/config/tc-aarch64.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'gas/config') diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index c8e3762..71b63d3 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -8116,8 +8116,7 @@ md_assemble (char *str) && do_encode (inst_base->opcode, &inst.base, &inst_base->value)) { /* Check that this instruction is supported for this CPU. */ - if (!opcode->avariant - || !AARCH64_CPU_HAS_ALL_FEATURES (cpu_variant, *opcode->avariant)) + if (!aarch64_cpu_supports_inst_p (cpu_variant, inst_base)) { as_bad (_("selected processor does not support `%s'"), str); return; -- cgit v1.1