From 920d2ddccb72a366140ed28283165b274f7a9045 Mon Sep 17 00:00:00 2001
From: Igor Tsimbalist <igor.v.tsimbalist@intel.com>
Date: Wed, 2 Nov 2016 12:24:39 -0700
Subject: Enable Intel AVX512_4FMAPS instructions

gas/

	* config/tc-i386.c (cpu_arch): Add .avx512_4fmaps.
	(cpu_noarch): Add noavx512_4fmaps.
	(process_operands): Handle implicit quad group.
	* doc/c-i386.texi: Document avx512_4fmaps, noavx512_4fmaps.
	* testsuite/gas/i386/i386.exp: Add AVX512_4FMAPS tests.
	* testsuite/gas/i386/avx512_4fmaps_vl-intel.d: New test.
	* testsuite/gas/i386/avx512_4fmaps_vl.d: Ditto.
	* testsuite/gas/i386/avx512_4fmaps_vl.s: Ditto.
	* testsuite/gas/i386/avx512_4fmaps-intel.d: Ditto.
	* testsuite/gas/i386/avx512_4fmaps.d: Ditto.
	* testsuite/gas/i386/avx512_4fmaps.s: Ditto.
	* testsuite/gas/i386/avx512_4fmaps-warn.l: Ditto.
	* testsuite/gas/i386/avx512_4fmaps-warn.s: Ditto.
	* testsuite/gas/i386/avx512_4fmaps_vl-warn.l: Ditto.
	* testsuite/gas/i386/avx512_4fmaps_vl-warn.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps.d: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l: Ditto.
	* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s: Ditto.

opcodes/

	* i386-dis.c. (enum): Add PREFIX_EVEX_0F389A,
	PREFIX_EVEX_0F389B, PREFIX_EVEX_0F38AA, PREFIX_EVEX_0F38AB.
	* i386-dis-evex.h (evex_table): Updated.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4FMAPS_FLAGS,
	CPU_ANY_AVX512_4FMAPS_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
	(cpu_flags): Add CpuAVX512_4FMAPS.
	(opcode_modifiers): Add ImplicitQuadGroup modifier.
	* i386-opc.h (AVX512_4FMAP): New.
	(i386_cpu_flags): Add cpuavx512_4fmaps.
	(ImplicitQuadGroup): New.
	(i386_opcode_modifier): Add implicitquadgroup.
	* i386-opc.tbl: Add Intel AVX512_4FMAPS instructions.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Ditto.
---
 gas/config/tc-i386.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

(limited to 'gas/config/tc-i386.c')

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 6724bca..d2ec480 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -962,6 +962,8 @@ static const arch_entry cpu_arch[] =
     CPU_AVX512IFMA_FLAGS, 0 },
   { STRING_COMMA_LEN (".avx512vbmi"), PROCESSOR_UNKNOWN,
     CPU_AVX512VBMI_FLAGS, 0 },
+  { STRING_COMMA_LEN (".avx512_4fmaps"), PROCESSOR_UNKNOWN,
+    CPU_AVX512_4FMAPS_FLAGS, 0 },
   { STRING_COMMA_LEN (".clzero"), PROCESSOR_UNKNOWN,
     CPU_CLZERO_FLAGS, 0 },
   { STRING_COMMA_LEN (".mwaitx"), PROCESSOR_UNKNOWN,
@@ -999,6 +1001,7 @@ static const noarch_entry cpu_noarch[] =
   { STRING_COMMA_LEN ("noavx512vl"), CPU_ANY_AVX512VL_FLAGS },
   { STRING_COMMA_LEN ("noavx512ifma"), CPU_ANY_AVX512IFMA_FLAGS },
   { STRING_COMMA_LEN ("noavx512vbmi"), CPU_ANY_AVX512VBMI_FLAGS },
+  { STRING_COMMA_LEN ("noavx512_4fmaps"), CPU_ANY_AVX512_4FMAPS_FLAGS },
 };
 
 #ifdef I386COFF
@@ -5966,6 +5969,25 @@ duplicate:
       i.reg_operands--;
       i.tm.operands--;
     }
+  else if (i.tm.opcode_modifier.implicitquadgroup)
+    {
+      /* The second operand must be {x,y,z}mmN, where N is a multiple of 4. */
+      gas_assert (i.operands >= 2
+          && (operand_type_equal (&i.types[1], &regxmm)
+              || operand_type_equal (&i.types[1], &regymm)
+              || operand_type_equal (&i.types[1], &regzmm)));
+      unsigned int regnum = register_number (i.op[1].regs);
+      unsigned int first_reg_in_group = regnum & ~3;
+      unsigned int last_reg_in_group = first_reg_in_group + 3;
+      if (regnum != first_reg_in_group) {
+        as_warn (_("the second source register `%s%s' implicitly denotes"
+            " `%s%.3s%d' to `%s%.3s%d' source group in `%s'"),
+            register_prefix, i.op[1].regs->reg_name,
+            register_prefix, i.op[1].regs->reg_name, first_reg_in_group,
+            register_prefix, i.op[1].regs->reg_name, last_reg_in_group,
+            i.tm.name);
+      }
+	}
   else if (i.tm.opcode_modifier.regkludge)
     {
       /* The imul $imm, %reg instruction is converted into
-- 
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