From 79d4951621eec323a92ad518f474f7ccee143aa3 Mon Sep 17 00:00:00 2001 From: Paul Brook Date: Tue, 5 Jun 2007 22:02:47 +0000 Subject: 2007-06-05 Paul Brook gas/ * config/tc-arm.c (insns): Correct Thumb-2 ldrd/strd opcodes. gas/testsuite/ * gas/arm/thumb32.d: Add writeback addressing mode tests. * gas/arm/thumb32.s: Update expected output. opcodes/ * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses. --- gas/config/tc-arm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'gas/config/tc-arm.c') diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 03f97d7..ca9e337 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -15017,8 +15017,8 @@ static const struct asm_opcode insns[] = #undef ARM_VARIANT #define ARM_VARIANT &arm_ext_v5e /* ARM Architecture 5TE. */ TUF(pld, 450f000, f810f000, 1, (ADDR), pld, t_pld), - TC3(ldrd, 00000d0, e9500000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd), - TC3(strd, 00000f0, e9400000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd), + TC3(ldrd, 00000d0, e8500000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd), + TC3(strd, 00000f0, e8400000, 3, (RRnpc, oRRnpc, ADDRGLDRS), ldrd, t_ldstd), TCE(mcrr, c400000, ec400000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c), TCE(mrrc, c500000, ec500000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c), -- cgit v1.1