From 96e9ba5fbba2e1e8fcafd8576d0a98738a0fbc49 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Tue, 12 Jul 2016 01:30:48 +0100 Subject: MIPS/GAS: Keep the ISA bit in the addend of branch relocations Correct a problem with the ISA bit being stripped from the addend of compressed branch relocations, affecting RELA targets. It has been there since microMIPS support has been added, with: commit df58fc944dbc6d5efd8d3826241b64b6af22f447 Author: Richard Sandiford Date: Sun Jul 24 14:20:15 2011 +0000 , ("MIPS: microMIPS ASE support") and R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 relocations originally affected, and the R_MIPS16_PC16_S1 relocation recently added with commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support") actually triggering a linker error, due to its heightened processing strictness level: $ cat test.s .text .set mips16 foo: b bar .set bar, 0x1235 .align 4, 0 $ as -EB -n32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 : 0: f000 1000 b 4 0: R_MIPS16_PC16_S1 *ABS*+0x1230 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o test test.o test.o: In function `foo': (.text+0x0): Branch to a non-instruction-aligned address $ This is because the ISA bit of the branch target does not match the ISA bit of the referring branch, hardwired to 1 of course. Retain the ISA bit then, so that the linker knows this is really MIPS16 code referred: $ objdump -dr fixed.o fixed.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 : 0: f000 1000 b 4 0: R_MIPS16_PC16_S1 *ABS*+0x1231 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o fixed fixed.o $ Add a set of MIPS16 tests to cover the relevant cases, excluding linker tests though which would overflow the in-place addend on REL targets and use them as dump patterns for RELA targets only. gas/ * config/tc-mips.c (md_apply_fix) : Keep the ISA bit in the addend calculated. * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit in `bar', export `foo'. * testsuite/gas/mips/mips16-branch-absolute.d: Adjust accordingly. * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: Likewise. ld/ * testsuite/ld-mips-elf/mips16-branch-absolute.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except from `mips16-branch-absolute' and `mips16-branch-absolute-addend', referred indirectly only. --- gas/ChangeLog | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'gas/ChangeLog') diff --git a/gas/ChangeLog b/gas/ChangeLog index 2e5015a..13243ce 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,22 @@ 2016-07-14 Maciej W. Rozycki + * config/tc-mips.c (md_apply_fix) + + : Keep the ISA bit in the + addend calculated. + * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit + in `bar', export `foo'. + * testsuite/gas/mips/mips16-branch-absolute.d: Adjust + accordingly. + * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise. + * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise. + * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: + Likewise. + * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: + Likewise. + +2016-07-14 Maciej W. Rozycki + * testsuite/gas/mips/mips16-branch-absolute.d: Update patterns. * testsuite/gas/mips/branch-absolute.d: New test. * testsuite/gas/mips/branch-absolute-n32.d: New test. -- cgit v1.1