From 95b965212b3172ac5dbf9a4d6afbf40eb0b9ab68 Mon Sep 17 00:00:00 2001 From: Dave Brolley Date: Fri, 28 Oct 2005 19:33:06 +0000 Subject: 2005-10-28 Dave Brolley Contribute the following change: 2003-09-24 Dave Brolley * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of CGEN_ATTR_VALUE_TYPE. * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. Use cgen_bitset_intersect_p. --- cpu/m32c.opc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'cpu/m32c.opc') diff --git a/cpu/m32c.opc b/cpu/m32c.opc index 226f8d0..6235326 100644 --- a/cpu/m32c.opc +++ b/cpu/m32c.opc @@ -824,14 +824,14 @@ m32c_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) { int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); - int isas = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_ISA); + CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); /* If attributes are absent, assume no restriction. */ if (machs == 0) machs = ~0; return ((machs & cd->machs) - && (isas & cd->isas)); + && cgen_bitset_intersect_p (& isas, cd->isas)); } /* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ -- cgit v1.1