From 5db04b0965e3e7a9344a93de22caae3c111de2cc Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 15 May 2015 09:47:39 -0700 Subject: Support AMD64/Intel ISAs in assembler/disassembler AMD64 spec and Intel64 spec differ in direct unconditional branches in 64-bit mode. AMD64 supports direct unconditional branches with 16-bit offset via the data size prefix, which truncates RIP to 16 bits, while the data size prefix is ignored by Intel64. This patch adds -mamd64/-mintel64 option to x86-64 assembler and -Mamd64/-Mintel64 option to x86-64 disassembler. The most permissive ISA, which is AMD64, is the default. GDB can add an option, similar to (gdb) help set disassembly-flavor Set the disassembly flavor. The valid values are "att" and "intel", and the default value is "att". to select which ISA to disassemble. binutils/ PR binutis/18386 * doc/binutils.texi: Document -Mamd64 and -Mintel64. gas/ PR binutis/18386 * config/tc-i386.c (OPTION_MAMD64): New. (OPTION_MINTEL64): Likewise. (md_longopts): Add -mamd64 and -mintel64. (md_parse_option): Handle OPTION_MAMD64 and OPTION_MINTEL64. (md_show_usage): Add -mamd64 and -mintel64. * doc/c-i386.texi: Document -mamd64 and -mintel64. gas/testsuite/ PR binutis/18386 * gas/i386/i386.exp: Run x86-64-branch-2 and x86-64-branch-3. * gas/i386/x86-64-branch.d: Also pass -Mintel64 to objdump. * gas/i386/ilp32/x86-64-branch.d: Likewise. * gas/i386/x86-64-branch-2.d: New file. * gas/i386/x86-64-branch-2.s: Likewise. * gas/i386/x86-64-branch-3.l: Likewise. * gas/i386/x86-64-branch-3.s: Likewise. ld/testsuite/ PR binutis/18386 * ld-x86-64/tlsgdesc.dd: Also pass -Mintel64 to objdump. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/x86-64.exp (x86_64tests): Also pass -Mintel64 to objdump for tlspic.dd and tlsgdesc.dd. opcodes/ PR binutis/18386 * i386-dis.c: Add comments for '@'. (x86_64_table): Use '@' on call/jmp for X86_64_E8/X86_64_E9. (enum x86_64_isa): New. (isa64): Likewise. (print_i386_disassembler_options): Add amd64 and intel64. (print_insn): Handle amd64 and intel64. (putop): Handle '@'. (OP_J): Don't ignore the operand size prefix for AMD64 in 64-bit. * i386-gen.c (cpu_flags): Add CpuAMD64 and CpuIntel64. * i386-opc.h (AMD64): New. (CpuIntel64): Likewise. (i386_cpu_flags): Add cpuamd64 and cpuintel64. * i386-opc.tbl: Add direct call/jmp with Disp16|Disp32 for AMD64. Mark direct call/jmp without Disp16|Disp32 as Intel64. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. --- binutils/ChangeLog | 5 +++++ binutils/doc/binutils.texi | 4 ++++ 2 files changed, 9 insertions(+) (limited to 'binutils') diff --git a/binutils/ChangeLog b/binutils/ChangeLog index ee2ddf0..2328f6e 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,8 @@ +2015-05-15 H.J. Lu + + PR binutis/18386 + * doc/binutils.texi: Document -Mamd64 and -Mintel64. + 2015-05-15 Nick Clifton * readelf.c (options): Add "decompress". diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi index 619c28e..75852e6 100644 --- a/binutils/doc/binutils.texi +++ b/binutils/doc/binutils.texi @@ -2175,6 +2175,10 @@ Select disassembly for the given architecture. @itemx att Select between intel syntax mode and AT&T syntax mode. +@item amd64 +@itemx intel64 +Select between AMD64 ISA and Intel64 ISA. + @item intel-mnemonic @itemx att-mnemonic Select between intel mnemonic mode and AT&T mnemonic mode. -- cgit v1.1