From 37fd5ef3ecc58caacd6abb4ace3d8b559e3db53d Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Wed, 20 Jul 2016 17:08:07 +0100 Subject: Add support to the ARC disassembler for selecting instruction classes. gas * testsuite/gas/arc/dsp.d: New file. * testsuite/gas/arc/dsp.s: Likewise. * testsuite/gas/arc/fpu.d: Likewise. * testsuite/gas/arc/fpu.s: Likewise. * testsuite/gas/arc/ext2op.d: Add specific disassembler option. * testsuite/gas/arc/ext3op.d: Likewise. * testsuite/gas/arc/tdpfp.d: Likewise. * testsuite/gas/arc/tfpuda.d: Likewise. opcodes * arc-dis.c (skipclass): New structure. (decodelist): New variable. (is_compatible_p): New function. (new_element): Likewise. (skip_class_p): Likewise. (find_format_from_table): Use skip_class_p function. (find_format): Decode first the extension instructions. (print_insn_arc): Select either ARCEM or ARCHS based on elf e_flags. (parse_option): New function. (parse_disassembler_options): Likewise. (print_arc_disassembler_options): Likewise. (print_insn_arc): Use parse_disassembler_options function. Proper select ARCv2 cpu variant. * disassemble.c (disassembler_usage): Add ARC disassembler options. binutils* doc/binutils.texi (objdump): Add ARC disassembler options. * testsuite/binutils-all/arc/dsp.s: New file. * testsuite/binutils-all/arc/objdump.exp: Likewise. include * dis-asm.h: Declare print_arc_disassembler_options. --- binutils/doc/binutils.texi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'binutils/doc/binutils.texi') diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi index 2f4ea0a..6038c72 100644 --- a/binutils/doc/binutils.texi +++ b/binutils/doc/binutils.texi @@ -2240,6 +2240,27 @@ some targets. If it is necessary to specify more than one disassembler option then multiple @option{-M} options can be used or can be placed together into a comma separated list. +For the ARC architecture the option can be used to specify the extra +instruction classes that should be disassembled. A comma separated +list of one or more of the following values should be used: + +@table @code +@item dsp +Recognize DSP instructions. +@item spfp +Recognize FPX SP instructions. +@item dpfp +Recognize FPX DP instructions. +@item quarkse_em +Recognize FPU QuarkSE-EM instructions. +@item fpuda +Recognize double assist FPU instructions. +@item fpus +Recognize single precision FPU instructions. +@item fpud +Recognize double precision FPU instructions. +@end table + If the target is an ARM architecture then this switch can be used to select which register name set is used during disassembler. Specifying @option{-M reg-names-std} (the default) will select the register names as @@ -2367,6 +2388,15 @@ ROM dumps). In these cases, the function entry mask would otherwise be decoded as VAX instructions, which would probably lead the rest of the function being wrongly disassembled. +For ARC, @option{dsp} controls the printing of DSP instructions, +@option{spfp} selects the printing of FPX single precision FP +instructions, @option{dpfp} selects the printing of FPX double +precision FP instructions, @option{quarkse_em} selects the printing of +special QuarkSE-EM instructions, @option{fpuda} selects the printing +of double precision assist instructions, @option{fpus} selects the +printing of FPU single precision FP instructions, while @option{fpud} +selects the printing of FPU souble precision FP instructions. + @item -p @itemx --private-headers Print information that is specific to the object file format. The exact -- cgit v1.1