From 5f101a3d6f22d0d98898df1f8cf8c406c5d96777 Mon Sep 17 00:00:00 2001 From: Tristan Gingold Date: Wed, 4 Aug 2010 10:22:14 +0000 Subject: 2010-08-04 Tristan Gingold * vms-alpha.c (alpha_vms_create_eisd_for_section): Make writable sections with relocs. (alpha_vms_add_fixup_lp): Set SEC_RELOC flag. (alpha_vms_add_fixup_ca): Ditto. (alpha_vms_add_fixup_qr): Ditto. Add comments. --- bfd/ChangeLog | 9 +++++++++ bfd/vms-alpha.c | 12 ++++++++++++ 2 files changed, 21 insertions(+) (limited to 'bfd') diff --git a/bfd/ChangeLog b/bfd/ChangeLog index c653f73..06b8335 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,14 @@ 2010-08-04 Tristan Gingold + * vms-alpha.c (alpha_vms_create_eisd_for_section): Make writable + sections with relocs. + (alpha_vms_add_fixup_lp): Set SEC_RELOC flag. + (alpha_vms_add_fixup_ca): Ditto. + (alpha_vms_add_fixup_qr): Ditto. + Add comments. + +2010-08-04 Tristan Gingold + * vms-alpha.c (alpha_vms_create_eisd_for_section): Do not make CODE sections writable. diff --git a/bfd/vms-alpha.c b/bfd/vms-alpha.c index 1f6e97f..e500cd4 100644 --- a/bfd/vms-alpha.c +++ b/bfd/vms-alpha.c @@ -2904,6 +2904,10 @@ alpha_vms_create_eisd_for_section (bfd *abfd, asection *sec) else if (!(sec->flags & SEC_READONLY)) eisd->u.eisd.flags |= EISD__M_WRT | EISD__M_CRF; + /* If relocations or fixup will be applied, make this isect writeable. */ + if (sec->flags & SEC_RELOC) + eisd->u.eisd.flags |= EISD__M_WRT | EISD__M_CRF; + if (!(sec->flags & SEC_LOAD)) { eisd->u.eisd.flags |= EISD__M_DZRO; @@ -8017,8 +8021,11 @@ alpha_vms_add_fixup_lp (struct bfd_link_info *info, bfd *src, bfd *shlib) sl->has_fixups = TRUE; VEC_APPEND_EL (sl->lp, bfd_vma, sect->output_section->vma + sect->output_offset + offset); + sect->output_section->flags |= SEC_RELOC; } +/* Add a code address fixup at address SECT + OFFSET to SHLIB. */ + static void alpha_vms_add_fixup_ca (struct bfd_link_info *info, bfd *src, bfd *shlib) { @@ -8031,8 +8038,11 @@ alpha_vms_add_fixup_ca (struct bfd_link_info *info, bfd *src, bfd *shlib) sl->has_fixups = TRUE; VEC_APPEND_EL (sl->ca, bfd_vma, sect->output_section->vma + sect->output_offset + offset); + sect->output_section->flags |= SEC_RELOC; } +/* Add a quad word relocation fixup at address SECT + OFFSET to SHLIB. */ + static void alpha_vms_add_fixup_qr (struct bfd_link_info *info, bfd *src, bfd *shlib, bfd_vma vec) @@ -8048,6 +8058,7 @@ alpha_vms_add_fixup_qr (struct bfd_link_info *info, bfd *src, r = VEC_APPEND (sl->qr, struct alpha_vms_vma_ref); r->vma = sect->output_section->vma + sect->output_offset + offset; r->ref = vec; + sect->output_section->flags |= SEC_RELOC; } static void @@ -8055,6 +8066,7 @@ alpha_vms_add_fixup_lr (struct bfd_link_info *info ATTRIBUTE_UNUSED, unsigned int shr ATTRIBUTE_UNUSED, bfd_vma vec ATTRIBUTE_UNUSED) { + /* Not yet supported. */ abort (); } -- cgit v1.1