From 4cc11e7607ae7fdd6d2bc6731191c888d303da79 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Thu, 27 Nov 2003 18:49:39 +0000 Subject: * elf32-arm.h: Fix comment typos. * elf32-d30v.c: Likewise. * elf32-dlx.c: Likewise. * elf32-h8300.c: Likewise. * elf32-i370.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-mcore.c: Likewise. * elf32-ppc.c: Likewise. * elf32-s390.c: Likewise. * elf32-sh.c: Likewise. * elf32-v850.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-mips.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-sparc.c: Likewise. * elflink.c: Likewise. * elflink.h: Likewise. * elfn32-mips.c: Likewise. * elfxx-ia64.c: Likewise. * elfxx-mips.c: Likewise. --- bfd/elf-bfd.h | 2 +- bfd/elf-hppa.h | 4 ++-- bfd/elf-m10200.c | 8 ++++---- bfd/elf-m10300.c | 10 +++++----- bfd/elf.c | 2 +- bfd/elf32-arm.h | 12 ++++++------ bfd/elf32-d30v.c | 4 ++-- bfd/elf32-dlx.c | 4 ++-- bfd/elf32-h8300.c | 4 ++-- bfd/elf32-i370.c | 2 +- bfd/elf32-ip2k.c | 6 +++--- bfd/elf32-m68hc11.c | 6 +++--- bfd/elf32-mcore.c | 2 +- bfd/elf32-ppc.c | 4 ++-- bfd/elf32-s390.c | 2 +- bfd/elf32-sh.c | 8 ++++---- bfd/elf32-v850.c | 6 +++--- bfd/elf32-xtensa.c | 4 ++-- bfd/elf64-alpha.c | 2 +- bfd/elf64-hppa.c | 6 +++--- bfd/elf64-mips.c | 4 ++-- bfd/elf64-mmix.c | 2 +- bfd/elf64-ppc.c | 2 +- bfd/elf64-sparc.c | 2 +- bfd/elflink.c | 10 +++++----- bfd/elflink.h | 16 ++++++++-------- bfd/elfn32-mips.c | 2 +- bfd/elfxx-ia64.c | 10 +++++----- bfd/elfxx-mips.c | 4 ++-- 29 files changed, 75 insertions(+), 75 deletions(-) (limited to 'bfd') diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h index b4db281..1c608a5 100644 --- a/bfd/elf-bfd.h +++ b/bfd/elf-bfd.h @@ -788,7 +788,7 @@ struct elf_backend_data (bfd *, void *, asymbol *); /* This function, if defined, is called after all local symbols and - global symbols converted to locals are emited into the symtab + global symbols converted to locals are emitted into the symtab section. It allows the backend to emit special global symbols not handled in the hash table. */ bfd_boolean (*elf_backend_output_arch_syms) diff --git a/bfd/elf-hppa.h b/bfd/elf-hppa.h index 0f15b0d..29579a4 100644 --- a/bfd/elf-hppa.h +++ b/bfd/elf-hppa.h @@ -1123,7 +1123,7 @@ elf_hppa_remark_useless_dynamic_symbols (struct elf_link_hash_entry *h, the generic code will warn that it is undefined. This behavior is undesirable on HPs since the standard shared - libraries contain reerences to undefined symbols. + libraries contain references to undefined symbols. So we twiddle the flags associated with such symbols so that they will not trigger the warning. ?!? FIXME. This is horribly fragile. @@ -1261,7 +1261,7 @@ elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info) hppa_info->data_segment_base = (bfd_vma)-1; /* HP's shared libraries have references to symbols that are not - defined anywhere. The generic ELF BFD linker code will complaim + defined anywhere. The generic ELF BFD linker code will complain about such symbols. So we detect the losing case and arrange for the flags on the symbol diff --git a/bfd/elf-m10200.c b/bfd/elf-m10200.c index 7373dc0..133d2a9 100644 --- a/bfd/elf-m10200.c +++ b/bfd/elf-m10200.c @@ -469,7 +469,7 @@ mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section, /* This function handles relaxing for the mn10200. - There's quite a few relaxing opportunites available on the mn10200: + There are quite a few relaxing opportunities available on the mn10200: * jsr:24 -> jsr:16 2 bytes @@ -918,7 +918,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again) if (value & 0x8000) continue; - /* Note that we've changed the reldection contents, etc. */ + /* Note that we've changed the relocation contents, etc. */ elf_section_data (sec)->relocs = internal_relocs; elf_section_data (sec)->this_hdr.contents = contents; symtab_hdr->contents = (unsigned char *) isymbuf; @@ -957,7 +957,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again) case 0x40: case 0x44: case 0xc8: - /* Note that we've changed the reldection contents, etc. */ + /* Note that we've changed the relocation contents, etc. */ elf_section_data (sec)->relocs = internal_relocs; elf_section_data (sec)->this_hdr.contents = contents; symtab_hdr->contents = (unsigned char *) isymbuf; @@ -1040,7 +1040,7 @@ mn10200_elf_relax_section (abfd, sec, link_info, again) && (value & 0x8000) != 0) continue; - /* Note that we've changed the reldection contents, etc. */ + /* Note that we've changed the relocation contents, etc. */ elf_section_data (sec)->relocs = internal_relocs; elf_section_data (sec)->this_hdr.contents = contents; symtab_hdr->contents = (unsigned char *) isymbuf; diff --git a/bfd/elf-m10300.c b/bfd/elf-m10300.c index 685ac9b..aa8fd0d 100644 --- a/bfd/elf-m10300.c +++ b/bfd/elf-m10300.c @@ -85,7 +85,7 @@ struct elf32_mn10300_link_hash_entry { to the target when it's valid and profitable to do so. */ unsigned char movm_args; - /* For funtion symbols, the amount of stack space that would be allocated + /* For function symbols, the amount of stack space that would be allocated by the movm instruction. This is redundant with movm_args, but we add it to the hash table to avoid computing it over and over. */ unsigned char movm_stack_size; @@ -1749,7 +1749,7 @@ elf32_mn10300_finish_hash_table_entry (gen_entry, in_args) byte_count += 4; /* If using "call" will result in larger code, then turn all - the associated "call" instructions into "calls" instrutions. */ + the associated "call" instructions into "calls" instructions. */ if (byte_count < entry->direct_calls) entry->flags |= MN10300_CONVERT_CALL_TO_CALLS; @@ -1759,7 +1759,7 @@ elf32_mn10300_finish_hash_table_entry (gen_entry, in_args) /* This function handles relaxing for the mn10300. - There's quite a few relaxing opportunites available on the mn10300: + There are quite a few relaxing opportunities available on the mn10300: * calls:32 -> calls:16 2 bytes * call:32 -> call:16 2 bytes @@ -3487,7 +3487,7 @@ compute_function_info (abfd, hash, addr, contents) } /* Now figure out how much stack space will be allocated by the movm - instruction. We need this kept separate from the funtion's normal + instruction. We need this kept separate from the function's normal stack space. */ if (hash->movm_args) { @@ -4008,7 +4008,7 @@ static const bfd_byte elf_mn10300_pic_plt_entry[PIC_PLT_ENTRY_SIZE] = /* Return offset of the GOT id in PLT0 entry. */ #define elf_mn10300_plt0_gotid_offset(info) 9 -/* Return offset of the tempoline in PLT entry */ +/* Return offset of the temporary in PLT entry */ #define elf_mn10300_plt_temp_offset(info) 8 /* Return offset of the symbol in PLT entry. */ diff --git a/bfd/elf.c b/bfd/elf.c index 71c3484..b6cd9f8 100644 --- a/bfd/elf.c +++ b/bfd/elf.c @@ -4677,7 +4677,7 @@ copy_private_bfd_data (bfd *ibfd, bfd *obfd) if (IS_SOLARIS_PT_INTERP (segment, section)) { /* Mininal change so that the normal section to segment - assigment code will work. */ + assignment code will work. */ segment->p_vaddr = section->vma; break; } diff --git a/bfd/elf32-arm.h b/bfd/elf32-arm.h index bcc1188..d42eb27 100644 --- a/bfd/elf32-arm.h +++ b/bfd/elf32-arm.h @@ -235,13 +235,13 @@ struct elf32_arm_link_hash_table /* The main hash table. */ struct elf_link_hash_table root; - /* The size in bytes of the section containg the Thumb-to-ARM glue. */ + /* The size in bytes of the section containing the Thumb-to-ARM glue. */ bfd_size_type thumb_glue_size; - /* The size in bytes of the section containg the ARM-to-Thumb glue. */ + /* The size in bytes of the section containing the ARM-to-Thumb glue. */ bfd_size_type arm_glue_size; - /* An arbitary input BFD chosen to hold the glue sections. */ + /* An arbitrary input BFD chosen to hold the glue sections. */ bfd * bfd_of_glue_owner; /* A boolean indicating whether knowledge of the ARM's pipeline @@ -965,7 +965,7 @@ error_return: instruction. It takes two thumb instructions to encode the target address. Each has - 11 bits to invest. The upper 11 bits are stored in one (identifed by + 11 bits to invest. The upper 11 bits are stored in one (identified by H-0.. see below), the lower 11 bits are stored in the other (identified by H-1). @@ -2610,7 +2610,7 @@ elf32_arm_print_private_bfd_data (abfd, ptr) switch (EF_ARM_EABI_VERSION (flags)) { case EF_ARM_EABI_UNKNOWN: - /* The following flag bits are GNU extenstions and not part of the + /* The following flag bits are GNU extensions and not part of the official ARM ELF extended ABI. Hence they are only decoded if the EABI version is not set. */ if (flags & EF_ARM_INTERWORK) @@ -3985,7 +3985,7 @@ elf32_arm_finish_dynamic_sections (output_bfd, info) name = info->fini_function; get_sym: /* If it wasn't set by elf_bfd_final_link - then there is nothing to ajdust. */ + then there is nothing to adjust. */ if (dyn.d_un.d_val != 0) { struct elf_link_hash_entry * eh; diff --git a/bfd/elf32-d30v.c b/bfd/elf32-d30v.c index 4b184d6..b08977f 100644 --- a/bfd/elf32-d30v.c +++ b/bfd/elf32-d30v.c @@ -293,7 +293,7 @@ bfd_elf_d30v_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd, if (reloc_entry->address > input_section->_cooked_size) return bfd_reloc_outofrange; - /* Work out which section the relocation is targetted at and the + /* Work out which section the relocation is targeted at and the initial relocation command value. */ /* Get symbol value. (Common symbols are special.) */ @@ -402,7 +402,7 @@ bfd_elf_d30v_reloc_21 (abfd, reloc_entry, symbol, data, input_section, output_bf if (reloc_entry->address > input_section->_cooked_size) return bfd_reloc_outofrange; - /* Work out which section the relocation is targetted at and the + /* Work out which section the relocation is targeted at and the initial relocation command value. */ /* Get symbol value. (Common symbols are special.) */ diff --git a/bfd/elf32-dlx.c b/bfd/elf32-dlx.c index 1f380e8..6ccb9f5 100644 --- a/bfd/elf32-dlx.c +++ b/bfd/elf32-dlx.c @@ -228,7 +228,7 @@ HOWTO (R_DLX_RELOC_16_LO, /* type */ FALSE); /* pcrel_offset */ -/* The gas default beheaver is not to preform the %hi modifier so that the +/* The gas default behavior is not to preform the %hi modifier so that the GNU assembler can have the lower 16 bits offset placed in the insn, BUT we do like the gas to indicate it is %hi reloc type so when we in the link loader phase we can have the corrected hi16 vale replace the buggous lo16 @@ -493,7 +493,7 @@ elf32_dlx_relocate26 (abfd, reloc_entry, symbol, data, More about this table - for dlx elf relocation we do not really need this table, if we have a rtype defined in this table will caused tc_gen_relocate confused and die on us, but if we remove - this table it will caused more problem, so for now simple soulation + this table it will caused more problem, so for now simple solution is to remove those entries which may cause problem. */ struct elf_reloc_map { diff --git a/bfd/elf32-h8300.c b/bfd/elf32-h8300.c index 452db27..18d87d4 100644 --- a/bfd/elf32-h8300.c +++ b/bfd/elf32-h8300.c @@ -649,7 +649,7 @@ elf32_h8_merge_private_bfd_data (bfd *ibfd, bfd *obfd) /* This function handles relaxing for the H8.. - There's a few relaxing opportunites available on the H8: + There are a few relaxing opportunities available on the H8: jmp/jsr:24 -> bra/bsr:8 2 bytes The jmp may be completely eliminated if the previous insn is a @@ -1116,7 +1116,7 @@ elf32_h8_relax_section (bfd *abfd, asection *sec, /* FALLTHRU */ /* This is a 24/32bit absolute address in a "mov" insn, which may - become a 16bit absoulte address if it is in the right range. */ + become a 16-bit absolute address if it is in the right range. */ case R_H8_DIR32A16: { bfd_vma value; diff --git a/bfd/elf32-i370.c b/bfd/elf32-i370.c index a844277..80c45f6 100644 --- a/bfd/elf32-i370.c +++ b/bfd/elf32-i370.c @@ -834,7 +834,7 @@ i370_elf_size_dynamic_sections (output_bfd, info) FIXME: We assume that there will never be relocations to locations in linker-created sections that do not have externally-visible names. Instead, we should work out precisely - which sections relocations are targetted at. */ + which sections relocations are targeted at. */ if (info->shared) { int c; diff --git a/bfd/elf32-ip2k.c b/bfd/elf32-ip2k.c index e8cb177..7606e0d 100644 --- a/bfd/elf32-ip2k.c +++ b/bfd/elf32-ip2k.c @@ -1007,7 +1007,7 @@ ip2k_elf_relax_section_page (abfd, sec, again, misc, page_start, page_end) int switch_table_128; int switch_table_256; - /* Walk thru the section looking for relaxation opertunities. */ + /* Walk thru the section looking for relaxation opportunities. */ for (irel = misc->irelbase; irel < irelend; irel++) { if (ELF32_R_TYPE (irel->r_info) != (int) R_IP2K_PAGE3) @@ -1388,7 +1388,7 @@ ip2k_final_link_relocate (howto, input_bfd, input_section, contents, rel, case R_IP2K_ADDR16CJP: if (BASEADDR (input_section) + rel->r_offset != page_addr + 2) { - /* No preceeding page instruction, verify that it isn't needed. */ + /* No preceding page instruction, verify that it isn't needed. */ if (PAGENO (relocation + rel->r_addend) != ip2k_nominal_page_bits (input_bfd, input_section, rel->r_offset, contents)) @@ -1398,7 +1398,7 @@ ip2k_final_link_relocate (howto, input_bfd, input_section, contents, rel, } else if (ip2k_relaxed) { - /* Preceeding page instruction. Verify that the page instruction is + /* Preceding page instruction. Verify that the page instruction is really needed. One reason for the relaxation to miss a page is if the section is not marked as executable. */ if (!ip2k_is_switch_table_128 (input_bfd, input_section, rel->r_offset - 2, contents) && diff --git a/bfd/elf32-m68hc11.c b/bfd/elf32-m68hc11.c index 4d8f6b5..42010b0 100644 --- a/bfd/elf32-m68hc11.c +++ b/bfd/elf32-m68hc11.c @@ -954,7 +954,7 @@ m68hc11_elf_relax_section (bfd *abfd, asection *sec, { unsigned long old_sec_size = sec->_cooked_size; - /* Note that we've changed the reldection contents, etc. */ + /* Note that we've changed the relocation contents, etc. */ elf_section_data (sec)->relocs = internal_relocs; free_relocs = NULL; @@ -985,7 +985,7 @@ m68hc11_elf_relax_section (bfd *abfd, asection *sec, continue; } - /* Note that we've changed the reldection contents, etc. */ + /* Note that we've changed the relocation contents, etc. */ elf_section_data (sec)->relocs = internal_relocs; free_relocs = NULL; @@ -1030,7 +1030,7 @@ m68hc11_elf_relax_section (bfd *abfd, asection *sec, if ((offset & 0xff80) == 0 || (offset & 0xff80) == 0xff80) { - /* Note that we've changed the reldection contents, etc. */ + /* Note that we've changed the relocation contents, etc. */ elf_section_data (sec)->relocs = internal_relocs; free_relocs = NULL; diff --git a/bfd/elf32-mcore.c b/bfd/elf32-mcore.c index 6992a3d..0fc9768 100644 --- a/bfd/elf32-mcore.c +++ b/bfd/elf32-mcore.c @@ -84,7 +84,7 @@ static reloc_howto_type mcore_elf_howto_raw[] = 0, /* bitpos */ complain_overflow_bitfield, /* complain_on_overflow */ bfd_elf_generic_reloc, /* special_function */ - "ADDR32", /* name *//* For compatability with coff/pe port. */ + "ADDR32", /* name *//* For compatibility with coff/pe port. */ FALSE, /* partial_inplace */ 0x0, /* src_mask */ 0xffffffff, /* dst_mask */ diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c index 9dcc2ea..8bbc26c 100644 --- a/bfd/elf32-ppc.c +++ b/bfd/elf32-ppc.c @@ -1764,7 +1764,7 @@ ppc_elf_relax_section (bfd *abfd, } isym = isymbuf + ELF32_R_SYM (irel->r_info); if (isym->st_shndx == SHN_UNDEF) - continue; /* We can't do anthing with undefined symbols. */ + continue; /* We can't do anything with undefined symbols. */ else if (isym->st_shndx == SHN_ABS) tsec = bfd_abs_section_ptr; else if (isym->st_shndx == SHN_COMMON) @@ -4919,7 +4919,7 @@ ppc_elf_relocate_section (bfd *output_bfd, branch_bit = BRANCH_PREDICT_BIT; /* Fall thru */ - /* Branch not taken predicition relocations. */ + /* Branch not taken prediction relocations. */ case R_PPC_ADDR14_BRNTAKEN: case R_PPC_REL14_BRNTAKEN: insn = bfd_get_32 (output_bfd, contents + rel->r_offset); diff --git a/bfd/elf32-s390.c b/bfd/elf32-s390.c index 189c828..b47ba22 100644 --- a/bfd/elf32-s390.c +++ b/bfd/elf32-s390.c @@ -484,7 +484,7 @@ elf_s390_is_local_label_name (abfd, name) Word 1 is a pointer to a structure describing the object Word 2 is used to point to the loader entry address. - The code for position independand PLT entries looks like this: + The code for position independent PLT entries looks like this: r12 holds addr of the current GOT at entry to the PLT diff --git a/bfd/elf32-sh.c b/bfd/elf32-sh.c index 0ac67e5..cf1e51f 100644 --- a/bfd/elf32-sh.c +++ b/bfd/elf32-sh.c @@ -457,7 +457,7 @@ static reloc_howto_type sh_elf_howto_table[] = TRUE), /* pcrel_offset */ /* The assembler will generate this reloc before a block of - instructions. A section should be processed as assumining it + instructions. A section should be processed as assuming it contains data, unless this reloc is seen. */ HOWTO (R_SH_CODE, /* type */ 0, /* rightshift */ @@ -2718,7 +2718,7 @@ sh_elf_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, /* The addend will be against the section symbol, thus for adjusting the addend, the relevant start is the start of the section. - N.B. If we want to abandom in-place changes here and + N.B. If we want to abandon in-place changes here and test directly using symbol + addend, we have to take into account that the addend has already been adjusted by -4. */ if (stop > addr && stop < toaddr) @@ -3412,7 +3412,7 @@ movi_shori_putval (bfd *output_bfd, unsigned long value, char *addr) #if 1 /* Note - this code has been "optimised" not to use r2. r2 is used by - GCC to return the address of large strutcures, so it should not be + GCC to return the address of large structures, so it should not be corrupted here. This does mean however, that this PLT does not conform to the SH PIC ABI. That spec says that r0 contains the type of the PLT and r2 contains the GOT id. This version stores the GOT id in r0 and @@ -3635,7 +3635,7 @@ static const bfd_byte *elf_sh_pic_plt_entry; /* Return offset of the GOT id in PLT0 entry. */ #define elf_sh_plt0_gotid_offset(info) 24 -/* Return offset of the tempoline in PLT entry */ +/* Return offset of the temporary in PLT entry */ #define elf_sh_plt_temp_offset(info) 8 /* Return offset of the symbol in PLT entry. */ diff --git a/bfd/elf32-v850.c b/bfd/elf32-v850.c index fb290eb..b964a7e 100644 --- a/bfd/elf32-v850.c +++ b/bfd/elf32-v850.c @@ -893,7 +893,7 @@ find_remembered_hi16s_reloc (addend, already_found) /* Extract the address. */ addr = match->address; - /* Remeber if this entry has already been used before. */ + /* Remember if this entry has already been used before. */ if (already_found) * already_found = match->found; @@ -904,7 +904,7 @@ find_remembered_hi16s_reloc (addend, already_found) } /* FIXME: The code here probably ought to be removed and the code in reloc.c - allowed to do its stuff instead. At least for most of the relocs, anwyay. */ + allowed to do its stuff instead. At least for most of the relocs, anyway. */ static bfd_reloc_status_type v850_elf_perform_relocation (abfd, r_type, addend, address) @@ -1362,7 +1362,7 @@ v850_elf_reloc (abfd, reloc, symbol, data, isection, obfd, err) if (reloc->address > isection->_cooked_size) return bfd_reloc_outofrange; - /* Work out which section the relocation is targetted at and the + /* Work out which section the relocation is targeted at and the initial relocation command value. */ if (reloc->howto->pc_relative) diff --git a/bfd/elf32-xtensa.c b/bfd/elf32-xtensa.c index 05d071d..44450c5 100644 --- a/bfd/elf32-xtensa.c +++ b/bfd/elf32-xtensa.c @@ -1714,7 +1714,7 @@ bfd_elf_xtensa_reloc (abfd, reloc_entry, symbol, data, input_section, / bfd_octets_per_byte (abfd))) return bfd_reloc_outofrange; - /* Work out which section the relocation is targetted at and the + /* Work out which section the relocation is targeted at and the initial relocation command value. */ /* Get symbol value. (Common symbols are special.) */ @@ -4171,7 +4171,7 @@ analyze_relocations (link_info) expensive and unnecessary unless the target section is actually going to be relaxed. This pass identifies all such sections by checking if they have L32Rs pointing to them. In the process, the total number - of relocations targetting each section is also counted so that we + of relocations targeting each section is also counted so that we know how much space to allocate for source_relocs against each relaxable literal section. */ diff --git a/bfd/elf64-alpha.c b/bfd/elf64-alpha.c index ac16fb5..1e2d246 100644 --- a/bfd/elf64-alpha.c +++ b/bfd/elf64-alpha.c @@ -3640,7 +3640,7 @@ elf64_alpha_size_got_sections (info) if (this_got == NULL) continue; - /* We are assuming no merging has yet ocurred. */ + /* We are assuming no merging has yet occurred. */ BFD_ASSERT (this_got == i); if (alpha_elf_tdata (this_got)->total_got_size > MAX_GOT_SIZE) diff --git a/bfd/elf64-hppa.c b/bfd/elf64-hppa.c index 6ef19c0..2dd2a36 100644 --- a/bfd/elf64-hppa.c +++ b/bfd/elf64-hppa.c @@ -975,7 +975,7 @@ elf64_hppa_dynamic_symbol_p (h, info) return FALSE; } -/* Mark all funtions exported by this file so that we can later allocate +/* Mark all functions exported by this file so that we can later allocate entries in .opd for them. */ static bfd_boolean @@ -1211,7 +1211,7 @@ elf64_hppa_post_process_headers (abfd, link_info) } /* Create function descriptor section (.opd). This section is called .opd - because it contains "official prodecure descriptors". The "official" + because it contains "official procedure descriptors". The "official" refers to the fact that these descriptors are used when taking the address of a procedure, thus ensuring a unique address for each procedure. */ @@ -2281,7 +2281,7 @@ elf64_hppa_finalize_dlt (dyn_h, data) bfd_put_64 (sdlt->owner, value, sdlt->contents + dyn_h->dlt_offset); } - /* Create a relocation for the DLT entry assocated with this symbol. + /* Create a relocation for the DLT entry associated with this symbol. When building a shared library the symbol does not have to be dynamic. */ if (dyn_h->want_dlt && (elf64_hppa_dynamic_symbol_p (dyn_h->h, info) || info->shared)) diff --git a/bfd/elf64-mips.c b/bfd/elf64-mips.c index 11d0565..4422ade 100644 --- a/bfd/elf64-mips.c +++ b/bfd/elf64-mips.c @@ -475,7 +475,7 @@ static reloc_howto_type mips_elf64_howto_table_rel[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 64 bit substraction. */ + /* 64 bit subtraction. */ HOWTO (R_MIPS_SUB, /* type */ 0, /* rightshift */ 4, /* size (0 = byte, 1 = short, 2 = long) */ @@ -970,7 +970,7 @@ static reloc_howto_type mips_elf64_howto_table_rela[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 64 bit substraction. */ + /* 64 bit subtraction. */ HOWTO (R_MIPS_SUB, /* type */ 0, /* rightshift */ 4, /* size (0 = byte, 1 = short, 2 = long) */ diff --git a/bfd/elf64-mmix.c b/bfd/elf64-mmix.c index 6440dcb..a747fd3 100644 --- a/bfd/elf64-mmix.c +++ b/bfd/elf64-mmix.c @@ -1280,7 +1280,7 @@ mmix_elf_reloc (abfd, reloc_entry, symbol, data, input_section, if (reloc_entry->address > input_section->_cooked_size) return bfd_reloc_outofrange; - /* Work out which section the relocation is targetted at and the + /* Work out which section the relocation is targeted at and the initial relocation command value. */ /* Get symbol value. (Common symbols are special.) */ diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c index 7e7e5ba..1282b3b 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c @@ -2641,7 +2641,7 @@ struct plt_entry pointers must reference the descriptor. Thus, a function pointer initialized to the address of a function in a shared library will either require a copy reloc, or a dynamic reloc. Using a copy reloc - redefines the function desctriptor symbol to point to the copy. This + redefines the function descriptor symbol to point to the copy. This presents a problem as a plt entry for that function is also initialized from the function descriptor symbol and the copy reloc may not be initialized first. */ diff --git a/bfd/elf64-sparc.c b/bfd/elf64-sparc.c index 92609e2..204b648 100644 --- a/bfd/elf64-sparc.c +++ b/bfd/elf64-sparc.c @@ -1502,7 +1502,7 @@ sparc64_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp) return TRUE; } -/* This function takes care of emiting STT_REGISTER symbols +/* This function takes care of emitting STT_REGISTER symbols which we cannot easily keep in the symbol hash table. */ static bfd_boolean diff --git a/bfd/elflink.c b/bfd/elflink.c index 919de9c..44cf1e4 100644 --- a/bfd/elflink.c +++ b/bfd/elflink.c @@ -795,7 +795,7 @@ _bfd_elf_merge_symbol (bfd *abfd, else olddef = TRUE; - /* We need to rememeber if a symbol has a definition in a dynamic + /* We need to remember if a symbol has a definition in a dynamic object or is weak in all dynamic objects. Internal and hidden visibility will make it unavailable to dynamic objects. */ if (newdyn && (h->elf_link_hash_flags & ELF_LINK_DYNAMIC_DEF) == 0) @@ -858,7 +858,7 @@ _bfd_elf_merge_symbol (bfd *abfd, return TRUE; } - /* We need to treat weak definiton right, depending on if there is a + /* We need to treat weak definition right, depending on if there is a definition from a dynamic object. */ if (bind == STB_WEAK) { @@ -1127,7 +1127,7 @@ _bfd_elf_merge_symbol (bfd *abfd, h->size, abfd, bfd_link_hash_common, sym->st_size))) return FALSE; - /* If the predumed common symbol in the dynamic object is + /* If the presumed common symbol in the dynamic object is larger, pretend that the new symbol has its size. */ if (h->size > *pvalue) @@ -1257,7 +1257,7 @@ _bfd_elf_add_default_symbol (bfd *abfd, if (override) { - /* We are overridden by an old defition. We need to check if we + /* We are overridden by an old definition. We need to check if we need to create the indirect symbol from the default name. */ hi = elf_link_hash_lookup (elf_hash_table (info), name, TRUE, FALSE, FALSE); @@ -1416,7 +1416,7 @@ nondefault: { /* Here SHORTNAME is a versioned name, so we don't expect to see the type of override we do in the case above unless it is - overridden by a versioned definiton. */ + overridden by a versioned definition. */ if (hi->root.type != bfd_link_hash_defined && hi->root.type != bfd_link_hash_defweak) (*_bfd_error_handler) diff --git a/bfd/elflink.h b/bfd/elflink.h index 04df5d6..de1fa77 100644 --- a/bfd/elflink.h +++ b/bfd/elflink.h @@ -875,7 +875,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info) { /* This should be impossible, since ELF requires that all global symbols follow all local symbols, and that sh_info - point to the first global symbol. Unfortunatealy, Irix 5 + point to the first global symbol. Unfortunately, Irix 5 screws this up. */ continue; } @@ -1174,7 +1174,7 @@ elf_link_add_object_symbols (bfd *abfd, struct bfd_link_info *info) int new_flag; /* Check the alignment when a common symbol is involved. This - can change when a common symbol is overriden by a normal + can change when a common symbol is overridden by a normal definition or a common symbol is ignored due to the old normal definition. We need to make sure the maximum alignment is maintained. */ @@ -1832,7 +1832,7 @@ compute_bucket_count (struct bfd_link_info *info) # if 1 /* Variant 1: optimize for short chains. We add the squares - of all the chain lengths (which favous many small chain + of all the chain lengths (which favors many small chain over a few long chains). */ for (j = 0; j < i; ++j) max += counts[j] * counts[j]; @@ -2056,7 +2056,7 @@ NAME(bfd_elf,size_dynamic_sections) (bfd *output_bfd, return FALSE; } - /* Make all global versions with definiton. */ + /* Make all global versions with definition. */ for (t = verdefs; t != NULL; t = t->next) for (d = t->globals.list; d != NULL; d = d->next) if (!d->symver && d->symbol) @@ -2121,7 +2121,7 @@ NAME(bfd_elf,size_dynamic_sections) (bfd *output_bfd, if (!info->allow_undefined_version) { - /* Check if all global versions have a definiton. */ + /* Check if all global versions have a definition. */ all_defined = TRUE; for (t = verdefs; t != NULL; t = t->next) for (d = t->globals.list; d != NULL; d = d->next) @@ -5674,7 +5674,7 @@ elf_gc_sweep_symbol (struct elf_link_hash_entry *h, void *idxptr) return TRUE; } -/* Propogate collected vtable information. This is called through +/* Propagate collected vtable information. This is called through elf_link_hash_traverse. */ static bfd_boolean @@ -5840,7 +5840,7 @@ elf_gc_sections (bfd *abfd, struct bfd_link_info *info) return TRUE; } -/* Called from check_relocs to record the existance of a VTINHERIT reloc. */ +/* Called from check_relocs to record the existence of a VTINHERIT reloc. */ bfd_boolean elf_gc_record_vtinherit (bfd *abfd, @@ -5896,7 +5896,7 @@ elf_gc_record_vtinherit (bfd *abfd, return TRUE; } -/* Called from check_relocs to record the existance of a VTENTRY reloc. */ +/* Called from check_relocs to record the existence of a VTENTRY reloc. */ bfd_boolean elf_gc_record_vtentry (bfd *abfd ATTRIBUTE_UNUSED, diff --git a/bfd/elfn32-mips.c b/bfd/elfn32-mips.c index d944a46..4d6327c 100644 --- a/bfd/elfn32-mips.c +++ b/bfd/elfn32-mips.c @@ -941,7 +941,7 @@ static reloc_howto_type elf_mips_howto_table_rela[] = 0x0000ffff, /* dst_mask */ FALSE), /* pcrel_offset */ - /* 64 bit substraction. */ + /* 64 bit subtraction. */ HOWTO (R_MIPS_SUB, /* type */ 0, /* rightshift */ 4, /* size (0 = byte, 1 = short, 2 = long) */ diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c index af2bc26..49317c6 100644 --- a/bfd/elfxx-ia64.c +++ b/bfd/elfxx-ia64.c @@ -53,7 +53,7 @@ descriptor for a MIN_PLT entry, and requires one IPLT reloc. MIN_PLT Created by PLTOFF entries against dynamic symbols. This - does not reqire dynamic relocations. */ + does not require dynamic relocations. */ #define NELEMS(a) ((int) (sizeof (a) / sizeof ((a)[0]))) @@ -81,7 +81,7 @@ struct elfNN_ia64_dyn_sym_info bfd_vma dtpmod_offset; bfd_vma dtprel_offset; - /* The symbol table entry, if any, that this was derrived from. */ + /* The symbol table entry, if any, that this was derived from. */ struct elf_link_hash_entry *h; /* Used to count non-got, non-plt relocations for delayed sizing @@ -804,7 +804,7 @@ elfNN_ia64_relax_section (abfd, sec, link_info, again) isym = isymbuf + ELFNN_R_SYM (irel->r_info); if (isym->st_shndx == SHN_UNDEF) - continue; /* We can't do anthing with undefined symbols. */ + continue; /* We can't do anything with undefined symbols. */ else if (isym->st_shndx == SHN_ABS) tsec = bfd_abs_section_ptr; else if (isym->st_shndx == SHN_COMMON) @@ -852,7 +852,7 @@ elfNN_ia64_relax_section (abfd, sec, link_info, again) else { - /* We can't do anthing with undefined symbols. */ + /* We can't do anything with undefined symbols. */ if (h->root.type == bfd_link_hash_undefined || h->root.type == bfd_link_hash_undefweak) continue; @@ -1954,7 +1954,7 @@ get_got (abfd, info, ia64_info) } /* Create function descriptor section (.opd). This section is called .opd - because it contains "official prodecure descriptors". The "official" + because it contains "official procedure descriptors". The "official" refers to the fact that these descriptors are used when taking the address of a procedure, thus ensuring a unique address for each procedure. */ diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 685f79b..37a3ee7 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -2319,7 +2319,7 @@ mips_elf_merge_gots (bfd2got_, p) first available global GOT entry in G. VALUE must contain the size of a GOT entry in bytes. For each global GOT entry that requires a dynamic relocation, NEEDED_RELOCS is incremented, and the symbol is - marked as not elligible for lazy resolution through a function + marked as not eligible for lazy resolution through a function stub. */ static int mips_elf_set_global_got_offset (entryp, p) @@ -2738,7 +2738,7 @@ _bfd_mips_elf_sign_extend (value, bits) } /* Return non-zero if the indicated VALUE has overflowed the maximum - range expressable by a signed number with the indicated number of + range expressible by a signed number with the indicated number of BITS. */ static bfd_boolean -- cgit v1.1