From bd434cc4d94ec3d2f9fc1e7c00c27b074f962bc1 Mon Sep 17 00:00:00 2001 From: "Jose E. Marchesi" Date: Thu, 30 Jan 2020 13:59:04 +0100 Subject: cpu,opcodes,gas: fix neg and neg32 instructions in BPF This patch fixes the neg/neg32 BPF instructions, which have K (=0) instead of X (=1) in their header source bit, despite operating on registes. cpu/ChangeLog: 2020-01-30 Jose E. Marchesi * bpf.cpu (define-alu-insn-un): The unary BPF instructions (neg and neg32) use OP_SRC_K even if they operate only in registers. opcodes/ChangeLog: 2020-01-30 Jose E. Marchesi * bpf-opc.c: Regenerate. gas/ChangeLog: 2020-01-30 Jose E. Marchesi * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu32.d: Likewise for `neg32'. * testsuite/gas/bpf/alu32-be.d: Likewise. --- cpu/ChangeLog | 6 ++++++ cpu/bpf.cpu | 2 +- gas/ChangeLog | 7 +++++++ gas/testsuite/gas/bpf/alu-be.d | 2 +- gas/testsuite/gas/bpf/alu.d | 2 +- gas/testsuite/gas/bpf/alu32-be.d | 2 +- gas/testsuite/gas/bpf/alu32.d | 2 +- opcodes/ChangeLog | 4 ++++ opcodes/bpf-opc.c | 8 ++++---- 9 files changed, 26 insertions(+), 9 deletions(-) diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 6bd48c5..b6a1e3a 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,9 @@ +2020-01-30 Jose E. Marchesi + + * bpf.cpu (define-alu-insn-un): The unary BPF instructions + (neg and neg32) use OP_SRC_K even if they operate only in + registers. + 2020-01-18 Nick Clifton Binutils 2.34 branch created. diff --git a/cpu/bpf.cpu b/cpu/bpf.cpu index d5a8eac..1378bda 100644 --- a/cpu/bpf.cpu +++ b/cpu/bpf.cpu @@ -373,7 +373,7 @@ ((ISA (.sym ebpf x-endian))) (.str x-basename x-suffix " $dst" x-endian) (+ (f-imm32 0) (f-offset16 0) ((.sym f-src x-endian) 0) (.sym dst x-endian) - x-op-class OP_SRC_X x-op-code) () ())) + x-op-class OP_SRC_K x-op-code) () ())) (define-pmacro (define-alu-insn-bin x-basename x-suffix x-op-class x-op-code x-endian) (begin diff --git a/gas/ChangeLog b/gas/ChangeLog index d2a31b5..ef3a47c 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2020-01-30 Jose E. Marchesi + + * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'. + * testsuite/gas/bpf/alu-be.d: Likewise. + * testsuite/gas/bpf/alu32.d: Likewise for `neg32'. + * testsuite/gas/bpf/alu32-be.d: Likewise. + 2020-01-30 Jan Beulich * testsuite/gas/i386/x86-64-branch-2.s, diff --git a/gas/testsuite/gas/bpf/alu-be.d b/gas/testsuite/gas/bpf/alu-be.d index 2a59a4c..c4ddbad 100644 --- a/gas/testsuite/gas/bpf/alu-be.d +++ b/gas/testsuite/gas/bpf/alu-be.d @@ -56,4 +56,4 @@ Disassembly of section .text: 168: c7 30 00 00 ff ff fd 66 arsh %r3,-666 170: c7 40 00 00 7e ad be ef arsh %r4,0x7eadbeef 178: cf 56 00 00 00 00 00 00 arsh %r5,%r6 - 180: 8f 20 00 00 00 00 00 00 neg %r2 + 180: 87 20 00 00 00 00 00 00 neg %r2 diff --git a/gas/testsuite/gas/bpf/alu.d b/gas/testsuite/gas/bpf/alu.d index e6bfbe1..f54317d 100644 --- a/gas/testsuite/gas/bpf/alu.d +++ b/gas/testsuite/gas/bpf/alu.d @@ -55,4 +55,4 @@ Disassembly of section .text: 168: c7 03 00 00 66 fd ff ff arsh %r3,-666 170: c7 04 00 00 ef be ad 7e arsh %r4,0x7eadbeef 178: cf 65 00 00 00 00 00 00 arsh %r5,%r6 - 180: 8f 02 00 00 00 00 00 00 neg %r2 + 180: 87 02 00 00 00 00 00 00 neg %r2 diff --git a/gas/testsuite/gas/bpf/alu32-be.d b/gas/testsuite/gas/bpf/alu32-be.d index 50eb3de..2c753e2 100644 --- a/gas/testsuite/gas/bpf/alu32-be.d +++ b/gas/testsuite/gas/bpf/alu32-be.d @@ -56,7 +56,7 @@ Disassembly of section .text: 168: c4 30 00 00 ff ff fd 66 arsh32 %r3,-666 170: c4 40 00 00 7e ad be ef arsh32 %r4,0x7eadbeef 178: cc 56 00 00 00 00 00 00 arsh32 %r5,%r6 - 180: 8c 20 00 00 00 00 00 00 neg32 %r2 + 180: 84 20 00 00 00 00 00 00 neg32 %r2 188: d4 90 00 00 00 00 00 10 endle %r9,16 190: d4 80 00 00 00 00 00 20 endle %r8,32 198: d4 70 00 00 00 00 00 40 endle %r7,64 diff --git a/gas/testsuite/gas/bpf/alu32.d b/gas/testsuite/gas/bpf/alu32.d index 2cdb74a..d2260ff 100644 --- a/gas/testsuite/gas/bpf/alu32.d +++ b/gas/testsuite/gas/bpf/alu32.d @@ -55,7 +55,7 @@ Disassembly of section .text: 168: c4 03 00 00 66 fd ff ff arsh32 %r3,-666 170: c4 04 00 00 ef be ad 7e arsh32 %r4,0x7eadbeef 178: cc 65 00 00 00 00 00 00 arsh32 %r5,%r6 - 180: 8c 02 00 00 00 00 00 00 neg32 %r2 + 180: 84 02 00 00 00 00 00 00 neg32 %r2 188: d4 09 00 00 10 00 00 00 endle %r9,16 190: d4 08 00 00 20 00 00 00 endle %r8,32 198: d4 07 00 00 40 00 00 00 endle %r7,64 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 19c2772..13333aa 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2020-01-30 Jose E. Marchesi + + * bpf-opc.c: Regenerate. + 2020-01-30 Jan Beulich * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators. diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index c728558..d03e8d2 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -452,13 +452,13 @@ static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSTLE), 0 } }, - & ifmt_negle, { 0x8f } + & ifmt_negle, { 0x87 } }, /* neg32 $dstle */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSTLE), 0 } }, - & ifmt_negle, { 0x8c } + & ifmt_negle, { 0x84 } }, /* add $dstbe,$imm32 */ { @@ -752,13 +752,13 @@ static const CGEN_OPCODE bpf_cgen_insn_opcode_table[MAX_INSNS] = { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSTBE), 0 } }, - & ifmt_negbe, { 0x8f } + & ifmt_negbe, { 0x87 } }, /* neg32 $dstbe */ { { 0, 0, 0, 0 }, { { MNEM, ' ', OP (DSTBE), 0 } }, - & ifmt_negbe, { 0x8c } + & ifmt_negbe, { 0x84 } }, /* endle $dstle,$endsize */ { -- cgit v1.1