From b11dcf4e7fcf7ef8557487744250b5ea27b71b9c Mon Sep 17 00:00:00 2001 From: Doug Evans Date: Tue, 10 Jun 2003 22:08:45 +0000 Subject: opcodes: * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate. * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate. * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate. * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate. * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate. * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate. * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate. gas: * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to CGEN_INSN_RELAXED. * config/tc-fr30.c (md_estimate_size_before_relax): Ditto. * config/tc-m32r.c (md_estimate_size_before_relax): Ditto. * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto. --- gas/ChangeLog | 8 ++++++++ gas/cgen.c | 4 ++-- gas/config/tc-fr30.c | 2 +- gas/config/tc-m32r.c | 2 +- gas/config/tc-openrisc.c | 2 +- opcodes/ChangeLog | 12 ++++++++++++ opcodes/cgen-asm.in | 4 ++-- opcodes/fr30-asm.c | 4 ++-- opcodes/fr30-desc.c | 2 +- opcodes/fr30-desc.h | 2 +- opcodes/frv-asm.c | 4 ++-- opcodes/frv-desc.c | 2 +- opcodes/frv-desc.h | 2 +- opcodes/ip2k-asm.c | 4 ++-- opcodes/ip2k-desc.c | 2 +- opcodes/ip2k-desc.h | 2 +- opcodes/iq2000-asm.c | 4 ++-- opcodes/iq2000-desc.c | 2 +- opcodes/iq2000-desc.h | 2 +- opcodes/m32r-asm.c | 4 ++-- opcodes/m32r-desc.c | 2 +- opcodes/m32r-desc.h | 2 +- opcodes/m32r-opc.c | 12 ++++++------ opcodes/openrisc-asm.c | 4 ++-- opcodes/openrisc-desc.c | 2 +- opcodes/openrisc-desc.h | 2 +- opcodes/xstormy16-asm.c | 4 ++-- opcodes/xstormy16-desc.c | 2 +- opcodes/xstormy16-desc.h | 2 +- 29 files changed, 61 insertions(+), 41 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 84659d0..c8b13af 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2003-06-10 Doug Evans + + * cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to + CGEN_INSN_RELAXED. + * config/tc-fr30.c (md_estimate_size_before_relax): Ditto. + * config/tc-m32r.c (md_estimate_size_before_relax): Ditto. + * config/tc-openrisc.c (md_estimate_size_before_relax): Ditto. + 2003-06-10 Alan Modra Gary Hade diff --git a/gas/cgen.c b/gas/cgen.c index e0740f5..9f2997e 100644 --- a/gas/cgen.c +++ b/gas/cgen.c @@ -431,7 +431,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) Relaxable instructions: We need to ensure we allocate enough space for the largest insn. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX)) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED)) /* These currently shouldn't get here. */ abort (); @@ -531,7 +531,7 @@ gas_cgen_finish_insn (insn, buf, length, relax_p, result) cgen_operand_lookup_by_num (gas_cgen_cpu_desc, fixups[i].opindex); /* Don't create fixups for these. That's done during relaxation. - We don't need to test for CGEN_INSN_RELAX as they can't get here + We don't need to test for CGEN_INSN_RELAXED as they can't get here (see above). */ if (relax_p && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXABLE) diff --git a/gas/config/tc-fr30.c b/gas/config/tc-fr30.c index f406107..b47903e 100644 --- a/gas/config/tc-fr30.c +++ b/gas/config/tc-fr30.c @@ -312,7 +312,7 @@ md_estimate_size_before_relax (fragP, segment) if ((strcmp (CGEN_INSN_MNEMONIC (insn), CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn)) == 0) - && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX)) + && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED)) break; } if (i == 4) diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c index d185d25..f601504 100644 --- a/gas/config/tc-m32r.c +++ b/gas/config/tc-m32r.c @@ -1507,7 +1507,7 @@ md_estimate_size_before_relax (fragP, segment) if ((strcmp (CGEN_INSN_MNEMONIC (insn), CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn)) == 0) - && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX)) + && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED)) break; } if (i == 4) diff --git a/gas/config/tc-openrisc.c b/gas/config/tc-openrisc.c index 091ef27..9b97958 100644 --- a/gas/config/tc-openrisc.c +++ b/gas/config/tc-openrisc.c @@ -304,7 +304,7 @@ md_estimate_size_before_relax (fragP, segment) if ((strcmp (CGEN_INSN_MNEMONIC (insn), CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn)) == 0) - && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX)) + && CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED)) break; } if (i == 4) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4ca1d76..22e2703 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,15 @@ +2003-06-10 Doug Evans + + * cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to + CGEN_INSN_RELAXED. + * fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate. + * frv-asm.c,frv-desc.c,frv-desc.h: Regenerate. + * ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate. + * iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate. + * m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate. + * openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate. + * xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate. + 2003-06-10 Gary Hade Alan Modra diff --git a/opcodes/cgen-asm.in b/opcodes/cgen-asm.in index 525177c..1ea0768 100644 --- a/opcodes/cgen-asm.in +++ b/opcodes/cgen-asm.in @@ -361,10 +361,10 @@ const CGEN_INSN * if (! @arch@_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c index be9c36c..8e7c7b8 100644 --- a/opcodes/fr30-asm.c +++ b/opcodes/fr30-asm.c @@ -657,10 +657,10 @@ fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg) if (! fr30_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; diff --git a/opcodes/fr30-desc.c b/opcodes/fr30-desc.c index 01d896f..3309d54 100644 --- a/opcodes/fr30-desc.c +++ b/opcodes/fr30-desc.c @@ -105,7 +105,7 @@ const CGEN_ATTR_TABLE fr30_cgen_insn_attr_table[] = { "SKIP-CTI", &bool_attr[0], &bool_attr[0] }, { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, { "RELAXABLE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, + { "RELAXED", &bool_attr[0], &bool_attr[0] }, { "NO-DIS", &bool_attr[0], &bool_attr[0] }, { "PBB", &bool_attr[0], &bool_attr[0] }, { "NOT-IN-DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, diff --git a/opcodes/fr30-desc.h b/opcodes/fr30-desc.h index 6be96d9..35d0de7 100644 --- a/opcodes/fr30-desc.h +++ b/opcodes/fr30-desc.h @@ -240,7 +240,7 @@ typedef enum cgen_operand_type { /* Enum declaration for cgen_insn attrs. */ typedef enum cgen_insn_attr { CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI - , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX + , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_NOT_IN_DELAY_SLOT, CGEN_INSN_END_BOOLS , CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS } CGEN_INSN_ATTR; diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c index b4647b1..0e3d8dd 100644 --- a/opcodes/frv-asm.c +++ b/opcodes/frv-asm.c @@ -960,10 +960,10 @@ frv_cgen_assemble_insn (cd, str, fields, buf, errmsg) if (! frv_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; diff --git a/opcodes/frv-desc.c b/opcodes/frv-desc.c index ffb0b27..97d49b3 100644 --- a/opcodes/frv-desc.c +++ b/opcodes/frv-desc.c @@ -188,7 +188,7 @@ const CGEN_ATTR_TABLE frv_cgen_insn_attr_table[] = { "SKIP-CTI", &bool_attr[0], &bool_attr[0] }, { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, { "RELAXABLE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, + { "RELAXED", &bool_attr[0], &bool_attr[0] }, { "NO-DIS", &bool_attr[0], &bool_attr[0] }, { "PBB", &bool_attr[0], &bool_attr[0] }, { "PRIVILEGED", &bool_attr[0], &bool_attr[0] }, diff --git a/opcodes/frv-desc.h b/opcodes/frv-desc.h index 3ecf091..a169e7a 100644 --- a/opcodes/frv-desc.h +++ b/opcodes/frv-desc.h @@ -696,7 +696,7 @@ typedef enum cgen_operand_type { /* Enum declaration for cgen_insn attrs. */ typedef enum cgen_insn_attr { CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI - , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX + , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_PRIVILEGED, CGEN_INSN_NON_EXCEPTING , CGEN_INSN_CONDITIONAL, CGEN_INSN_FR_ACCESS, CGEN_INSN_PRESERVE_OVF, CGEN_INSN_END_BOOLS , CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_UNIT, CGEN_INSN_FR400_MAJOR diff --git a/opcodes/ip2k-asm.c b/opcodes/ip2k-asm.c index 6a1653b..524f256 100644 --- a/opcodes/ip2k-asm.c +++ b/opcodes/ip2k-asm.c @@ -908,10 +908,10 @@ ip2k_cgen_assemble_insn (cd, str, fields, buf, errmsg) if (! ip2k_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; diff --git a/opcodes/ip2k-desc.c b/opcodes/ip2k-desc.c index f8e4932..0ab2cc5 100644 --- a/opcodes/ip2k-desc.c +++ b/opcodes/ip2k-desc.c @@ -105,7 +105,7 @@ const CGEN_ATTR_TABLE ip2k_cgen_insn_attr_table[] = { "SKIP-CTI", &bool_attr[0], &bool_attr[0] }, { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, { "RELAXABLE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, + { "RELAXED", &bool_attr[0], &bool_attr[0] }, { "NO-DIS", &bool_attr[0], &bool_attr[0] }, { "PBB", &bool_attr[0], &bool_attr[0] }, { "EXT-SKIP-INSN", &bool_attr[0], &bool_attr[0] }, diff --git a/opcodes/ip2k-desc.h b/opcodes/ip2k-desc.h index 84db7fb..1122026 100644 --- a/opcodes/ip2k-desc.h +++ b/opcodes/ip2k-desc.h @@ -225,7 +225,7 @@ typedef enum cgen_operand_type { /* Enum declaration for cgen_insn attrs. */ typedef enum cgen_insn_attr { CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI - , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX + , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_EXT_SKIP_INSN, CGEN_INSN_SKIPA , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS } CGEN_INSN_ATTR; diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index bb61af0..7fb795e 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -794,10 +794,10 @@ iq2000_cgen_assemble_insn (cd, str, fields, buf, errmsg) if (! iq2000_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; diff --git a/opcodes/iq2000-desc.c b/opcodes/iq2000-desc.c index 402f726..6c7f3b0 100644 --- a/opcodes/iq2000-desc.c +++ b/opcodes/iq2000-desc.c @@ -105,7 +105,7 @@ const CGEN_ATTR_TABLE iq2000_cgen_insn_attr_table[] = { "SKIP-CTI", &bool_attr[0], &bool_attr[0] }, { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, { "RELAXABLE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, + { "RELAXED", &bool_attr[0], &bool_attr[0] }, { "NO-DIS", &bool_attr[0], &bool_attr[0] }, { "PBB", &bool_attr[0], &bool_attr[0] }, { "YIELD-INSN", &bool_attr[0], &bool_attr[0] }, diff --git a/opcodes/iq2000-desc.h b/opcodes/iq2000-desc.h index fe3a5e3..13b4f56 100644 --- a/opcodes/iq2000-desc.h +++ b/opcodes/iq2000-desc.h @@ -273,7 +273,7 @@ typedef enum cgen_operand_type { /* Enum declaration for cgen_insn attrs. */ typedef enum cgen_insn_attr { CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI - , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX + , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_YIELD_INSN, CGEN_INSN_LOAD_DELAY , CGEN_INSN_EVEN_REG_NUM, CGEN_INSN_UNSUPPORTED, CGEN_INSN_USES_RD, CGEN_INSN_USES_RS , CGEN_INSN_USES_RT, CGEN_INSN_USES_R31, CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31 diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index 4abe187..2bd751a 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -659,10 +659,10 @@ m32r_cgen_assemble_insn (cd, str, fields, buf, errmsg) if (! m32r_cgen_insn_supported (cd, insn)) continue; #endif - /* If the RELAX attribute is set, this is an insn that shouldn't be + /* If the RELAXED attribute is set, this is an insn that shouldn't be chosen immediately. Instead, it is used during assembler/linker relaxation if possible. */ - if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) + if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) continue; str = start; diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c index 30a0719..023ab62 100644 --- a/opcodes/m32r-desc.c +++ b/opcodes/m32r-desc.c @@ -118,7 +118,7 @@ const CGEN_ATTR_TABLE m32r_cgen_insn_attr_table[] = { "SKIP-CTI", &bool_attr[0], &bool_attr[0] }, { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] }, { "RELAXABLE", &bool_attr[0], &bool_attr[0] }, - { "RELAX", &bool_attr[0], &bool_attr[0] }, + { "RELAXED", &bool_attr[0], &bool_attr[0] }, { "NO-DIS", &bool_attr[0], &bool_attr[0] }, { "PBB", &bool_attr[0], &bool_attr[0] }, { "FILL-SLOT", &bool_attr[0], &bool_attr[0] }, diff --git a/opcodes/m32r-desc.h b/opcodes/m32r-desc.h index 85e22ee..8781772 100644 --- a/opcodes/m32r-desc.h +++ b/opcodes/m32r-desc.h @@ -204,7 +204,7 @@ typedef enum cgen_operand_type { /* Enum declaration for cgen_insn attrs. */ typedef enum cgen_insn_attr { CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI - , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAX + , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_FILL_SLOT, CGEN_INSN_SPECIAL , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_PIPE , CGEN_INSN_END_NBOOLS diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c index b60c1bf..8143b61 100644 --- a/opcodes/m32r-opc.c +++ b/opcodes/m32r-opc.c @@ -1187,7 +1187,7 @@ static const CGEN_IBASE m32r_cgen_macro_insn_table[] = /* bc $disp24 */ { -1, "bc24r", "bc", 32, - { 0|A(RELAX)|A(COND_CTI)|A(ALIAS), { (1<