| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-12-12 | sim: or1k: add cgen generated files | Stafford Horne | 11 | -0/+27536 |
| 2017-12-12 | sim: or1k: add or1k target to sim | Stafford Horne | 11 | -0/+1637 |
| 2017-12-12 | sim: cgen: add MUL2OFSI and MUL1OFSI functions (needed for OR1K l.mul[u]) | Peter Gavin | 2 | -0/+25 |
| 2017-12-12 | sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd]) | Peter Gavin | 5 | -5/+149 |
| 2017-11-01 | FT32: support for FT32B processor - part 2/2 | James Bowman | 2 | -7/+19 |
| 2017-10-12 | FT32: support for FT32B processor - part 1 | James Bowman | 2 | -7/+15 |
| 2017-10-12 | Add myself as ft32 maintainer for sim. | James Bowman | 2 | -0/+5 |
| 2017-10-03 | Update my email address. | Jim Wilson | 2 | -1/+5 |
| 2017-09-21 | [SIM, ARM] Fix build failure | Yao Qi | 2 | -1/+8 |
| 2017-09-06 | Honor an existing CC_FOR_BUILD in the environment for sim. | John Baldwin | 59 | -202/+434 |
| 2017-09-04 | Define an error function in the PPC simulator library. | John Baldwin | 2 | -0/+15 |
| 2017-09-04 | Fix simulator | Anthony Green | 2 | -7/+16 |
| 2017-08-29 | Fix simulation of MSP430's open system call. | Jozef Lawrynowicz | 2 | -10/+30 |
| 2017-06-02 | Correct check for endianness | Michael Eager | 2 | -1/+5 |
| 2017-05-24 | Refactor disassembler selection | Yao Qi | 2 | -1/+9 |
| 2017-04-22 | Fix ldn/stn multiple instructions. Fix testcases with unaligned data. | Jim Wilson | 14 | -202/+454 |
| 2017-04-08 | Add support for fcvtl and fcvtl2. | Jim Wilson | 4 | -0/+112 |
| 2017-04-08 | Support the fcmXX zero instructions. | Jim Wilson | 4 | -0/+232 |
| 2017-03-25 | Fix bug with cmn/adds where C flag was incorrectly set. | Jim Wilson | 4 | -1/+27 |
| 2017-03-03 | Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite. | Jim Wilson | 5 | -9/+89 |
| 2017-02-25 | Add missing smov support, and clean up existing umov support. | Jim Wilson | 4 | -75/+227 |
| 2017-02-25 | Add missing cnt (popcount) instruction support. | Jim Wilson | 4 | -0/+94 |
| 2017-02-19 | Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv. | Jim Wilson | 8 | -36/+157 |
| 2017-02-14 | Add self to aarch64 maintainers. Fix mla instruction. | Jim Wilson | 6 | -49/+128 |
| 2017-02-14 | Fix bit/bif instructions. | Jim Wilson | 4 | -10/+107 |
| 2017-02-14 | Add ldn/stn single support, fix ldnr support. | Jim Wilson | 6 | -269/+698 |
| 2017-02-13 | sim: use ARRAY_SIZE instead of ad-hoc sizeof calculations | Mike Frysinger | 39 | -62/+141 |
| 2017-01-23 | Add support for cmtst. | Jim Wilson | 4 | -0/+113 |
| 2017-01-17 | Fixes for addv and xtn2 instructions. | Jim Wilson | 5 | -31/+158 |
| 2017-01-09 | Fix problems with the implementation of the uzp1 and uzp2 instructions. | Jim Wilson | 4 | -17/+273 |
| 2017-01-04 | Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul. | Jim Wilson | 9 | -33/+618 |
| 2017-01-01 | update copyright year range in GDB files | Joel Brobecker | 576 | -576/+576 |
| 2016-12-21 | Fix bugs with float compare and Inf operands. | Jim Wilson | 4 | -0/+184 |
| 2016-12-14 | MAINTAINERS: Add myself as a MIPS maintainer | Maciej W. Rozycki | 2 | -0/+6 |
| 2016-12-13 | Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes. | Jim Wilson | 7 | -45/+309 |
| 2016-12-03 | Fix bugs with tbnz/tbz instructions.users/ARM/embedded-binutils-master-2016q4 | Jim Wilson | 2 | -3/+8 |
| 2016-12-01 | Fix typo in ChangeLog entry. | Jim Wilson | 1 | -1/+1 |
| 2016-12-01 | Fix bug with FP stur instructions. | Jim Wilson | 2 | -6/+11 |
| 2016-11-12 | sim: mips: add PR info to ChangeLog | Mike Frysinger | 1 | -0/+2 |
| 2016-11-11 | sim: mips: fix dv-tx3904cpu build error | Mike Frysinger | 2 | -0/+10 |
| 2016-11-11 | sim: mips: fix builds for r3900 cpus due to missing check_u64 | Mike Frysinger | 2 | -0/+5 |
| 2016-10-18 | sim: avr: move changelog entries to subdir | Mike Frysinger | 2 | -7/+7 |
| 2016-08-16 | sim: m68hc11: use standard STATIC_INLINE helper | Mike Frysinger | 2 | -25/+34 |
| 2016-08-15 | sim: unify symbol table handling | Mike Frysinger | 17 | -170/+164 |
| 2016-08-13 | sim: m68hc11: standardize sim_cpu naming | Mike Frysinger | 10 | -347/+366 |
| 2016-08-13 | sim: m68hc11: fix up various prototype related warnings | Mike Frysinger | 8 | -12/+29 |
| 2016-08-13 | sim: cgen: constify mode_names | Mike Frysinger | 3 | -2/+7 |
| 2016-08-13 | sim: cgen: drop unused argv/envp definitions | Mike Frysinger | 2 | -8/+5 |
| 2016-08-13 | sim: bfin: split out common mach/model defines into arch.h [PR sim/20438] | Mike Frysinger | 4 | -26/+55 |
| 2016-08-12 | Undo the previous change to the aarch64 sim - exporting aarch64_step() - and ... | Nick Clifton | 3 | -9/+19 |
