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command interpreter to use to run the input file. This is
necessary because otherwise SHELL is taken from the user's
environment, and not from the makefile that invoked this script
and the user might not be running an sh-like shell.
* cris/Makefile.in: Pass -shell parameter to genmloop.sh.
* fr30/Makefile.in: Likewise.
* frv/Makefile.in: Likewise.
* i960/Makefile.in: Likewise.
* iq2000/Makefile.in: Likewise.
* m32r/Makefile.in: Likewise.
* frv/mloop.in: Add missing start of line comment marker.
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* config.in: Ditto.
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* Makefile.in (LIBS): Set from @LIBS@.
* configure: Regenerate.
* config.in: Ditto.
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* cris/config.in: Ditto.
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* configure: Regenerate to track ../common/common.m4 changes.
* config.in: Ditto.
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* main.c (main): Add option to set raw console.
* mem.h (m32c_use_raw_console): Declare.
* mem.c (m32c_sim_restore_console): Only restore console if it's
been previously set.
(m32c_use_raw_console): Define.
(mem_get_byte): Set raw console if m32c_use_raw_console is set.
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* sis.c: Correct spelling error.
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2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* cris/configure: Regenerate.
sim/common:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* aclocal.m4: Include ../../config/acx.m4.
* common.m4: Use ACX_PKGVERSION and ACX_BUGURL.
* configure, config.in: Regenerate.
* Make-common.in (LIB_OBJS): Add version.o.
(version.c, version.o): New rules.
* run.c: Include version.h.
(usage): Add help parameter. Print output either to stdout or
stderr depending on that parameter.
(print_version): New.
(main): Check for --help and --version.
* run-sim.h (sim_target_display_usage): Add help parameter.
* version.h: New.
sim/arm:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
* wrapper.c (sim_target_display_usage): Add help parameter.
sim/cr16:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/d10v:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/erc32:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/frv:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/h8300:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/iq2000:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/m32c:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/m32r:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/m68hc11:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/mcore:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/mips:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/mn10300:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/ppc:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure.ac: Use ACX_PKGVERSION and ACX_BUGURL.
* configure, config.in: Regenerated.
* Makefile.in (LIB_OBJ): Add version.o.
(version.c, version.o): New rules.
* psim.c (psim_usage): Add help parameter. Print the bug URL.
Exit with code 0 for help.
(psim_options): Update calls to psim_usage. Handle --help and
--version.
* psim.h (psim_usage): Update prototype.
* main.c (main): Update psim_usage call.
sim/sh:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/sh64:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
sim/v850:
2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* configure: Regenerate.
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* mem.h (m32c_sim_restore_console): New.
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* cpu.h (m32c_opcode_pc): New.
(in_gdb): New.
* gdb-if.c (sim_open): Add Timer A support. Support unbuffered
console.
* int.c (trigger_interrupt): Manage the U flag properly.
(trigger_based_interrupt): Likewise.
(trigger_fixed_interrupt): New.
(trigger_peripheral_interrupt): New.
* int.h (trigger_peripheral_interrupt): New.
* m32c.opc: Use m32c_opcode_pc throughout, as needed.
(decode_m32c): Detect jump-to-zero with traceback.
(BRK): Try to do the right thing, keeping track of whether we're
in gdb or not, and if the user has provided a handler or not.
(GBRK): Alternate break opcode for gdb, in case the user's app
needs to use BRK for itself.
(BRK2): Implement.
* main.c: Add Timer A support. Support TCP-based console.
(setup_tcp_console): New.
(main): Add Timer A support. Support TCP-based console.
* mem.c: Add Timer A support. Support TCP-based console.
(mem_ptr): Enhance NULL pointer detection.
(stdin_ready): New.
(m32c_sim_restore_console): New.
(mem_get_byte): Check for console input ready.
(update_timer_a): New.
* r8c.opc (SSTR): Use r0l, not r0h.
(REIT): Fix return frame logic.
* reg.c (print_flags): New.
(trace_register_changes): Use it.
(m32c_dump_all_registers): New.
* timer_a.h: New.
* load.c: Fix indentation.
* trace.c: Fix indentation.
* trace.h: Fix indentation.
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addb.cgs addd.cgs addi.cgs andb.cgs andd.cgs andw.cgs
ashub.cgs ashub_i.cgs ashud.cgs ashud_i.cgs ashuw.cgs
ashuw_i.cgs cmpi.cgs cmpw.cgs jlt.cgs jump.cgs loadd.cgs
loadw.cgs lshb.cgs lshb_i.cgs lshd.cgs lshd_i.cgs lshw.cgs
lshw_i.cgs movb.cgs movd.cgs movw.cgs movxb.cgs movxw.cgs
movzb.cgs movzw.cgs mulb.cgs muluw.cgs mulw.cgs orb.cgs
ord.cgs orw.cgs pop1.cgs pop2.cgs pop3.cgs popret1.cgs
popret2.cgs popret3.cgs push1.cgs push2.cgs push3.cgs
Added BIT operation testcases:
cbitb.cgs cbitw.cgs sbitb.cgs sbitw.cgs tbitb.cgs tbit.cgs and tbitw.cgs
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* sim-signal.c: Define missing signals for _WIN32.
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ChangeLog:
Add simulator for National cr16 processor.
* cr16: New directory with cr16 simulator files.
* configure.ac: Add an entry for National cr16 target.
* configure: Regenerate.
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ChangeLog config.in configure configure.ac cr16_sim.h endian.c
gencode.c interp.c Makefile.in simops.c: Add these file for CR16 target simulator.
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* configure: Regenerate.
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nltvals.def: Rebuild.
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* configure: Regenerate.
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(OP_18007E0): Likewise.
(OP_2C007E0): Likewise.
(OP_28007E0): Likewise.
* v850.igen (divh): Likewise.
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* configure.ac (v850): V850 now has a testsuite.
* configure (v850): Likewise.
Index: testsuite/ChangeLog
* sim/v850/: New directory.
* sim/v850/allinsns.exp: New.
* sim/v850/bsh.cgs: New.
* sim/v850/div.cgs: New.
* sim/v850/divh.cgs: New.
* sim/v850/divh_3.cgs: New.
* sim/v850/divhu.cgs: New.
* sim/v850/divu.cgs: New.
* sim/v850/sar.cgs: New.
* sim/v850/satadd.cgs: New.
* sim/v850/satsub.cgs: New.
* sim/v850/satsubi.cgs: New.
* sim/v850/satsubr.cgs: New.
* sim/v850/shl.cgs: New.
* sim/v850/shr.cgs: New.
* sim/v850/testutils.cgs: New.
* sim/v850/testutils.inc: New.
Index: v850/ChangeLog
* simops.c (OP_C0): Correct saturation logic.
(OP_220): Likewise.
(OP_A0): Likewise.
(OP_660): Likewise.
(OP_80): Likewise.
* simops.c (OP_2A0): If the shift count is zero, clear the
carry.
(OP_A007E0): Likewise.
(OP_2C0): Likewise.
(OP_C007E0): Likewise.
(OP_280): Likewise.
(OP_8007E0): Likewise.
* simops.c (OP_2C207E0): Correct PSW flags for special divu
conditions.
(OP_2C007E0): Likewise, for div.
(OP_28207E0): Likewise, for divhu.
(OP_28007E0): Likewise, for divh. Also, sign-extend the correct
operand.
* v850.igen (divh): Likewise, for 2-op divh.
* v850.igen (bsh): Fix carry logic.
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* interp.c (macl): Fix non-portable implementation.
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cut_point.
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stack-pointer match pattern for 4K host environment.
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* mips.igen (check_fmt_p): Provide a separate mips32r2 definition
that unconditionally allows fmt_ps.
(ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
(FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
(PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
filter from 64,f to 32,f.
(PREFX): Change filter from 64 to 32.
(LDXC1, LUXC1): Provide separate mips32r2 implementations
that use do_load_double instead of do_load. Make both LUXC1
versions unpredictable if SizeFGR () != 64.
(SDXC1, SUXC1): Extend to mips32r2, using do_store_double
instead of do_store. Remove unused variable. Make both SUXC1
versions unpredictable if SizeFGR () != 64.
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test_cc.
* sim/cris/asm/asr.ms: Correct expected condition code flags.
* sim/cris/asm/boundr.ms: Ditto.
* sim/cris/asm/dstep.ms: Ditto.
* sim/cris/asm/lsr.ms: Ditto.
* sim/cris/asm/movecr.ms: Ditto.
* sim/cris/asm/mover.ms: Ditto.
* sim/cris/asm/neg.ms: Ditto. Use test_cc, not test_move_cc.
* sim/cris/asm/op3.ms: Check the condition code flags after the insn
under test.
* sim/cris/asm/movecrt10.ms: Update expected number of simulated
cycles.
* sim/cris/asm/movecrt32.ms: Ditto.
* sim/cris/asm/jsr.ms: Don't use local label 8.
* sim/cris/asm/nonvcv32.ms: New test.
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cris/cpuv10.h, cris/cpuv32.c, cris/cpuv32.h, cris/cris-desc.c,
cris/cris-desc.h, cris/cris-opc.h, cris/decodev10.c,
cris/decodev10.h, cris/decodev32.c, cris/decodev32.h,
cris/modelv10.c, cris/modelv32.c, cris/semcrisv10f-switch.c,
cris/semcrisv32f-switch.c: Regenerate.
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* ppc-tdep.h: Remove ppc_spr constants.
(struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and
ppc_builtin_type_vec128 members.
(PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM)
(PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM)
(PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM)
(PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM)
(PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants.
* rs6000-tdep.c: Include preparsed descriptions.
(init_sim_regno_table): Do not iterate over pseudo registers.
Look up segment registers by name. Use sim_spr_register_name
for SPRs.
(rs6000_register_sim_regno): Call init_sim_regno_table here.
(rs6000_builtin_type_vec128): Delete.
(rs6000_register_name): Only handle SPE pseudo registers and upper
halves. Call tdesc_register_name for everything else.
(rs6000_register_type): Delete. Replace with...
(rs6000_pseudo_register_type): ...this new function. Only handle
SPE pseudo registers.
(rs6000_register_reggroup_p): Delete. Replace with...
(rs6000_pseudo_register_reggroup_p): ...this new function. Only
handle SPE pseudo registers.
(rs6000_convert_register_p): Use ppc_fp0_regnum instead of
"struct reg".
(rs6000_register_to_value, rs6000_value_to_register): Remove check
of reg->fpr.
(e500_register_reggroup_p): Delete.
(STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64)
(COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS)
(PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS)
(PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros.
(registers_powerpc, registers_403, registers_403GC, registers_505)
(registers_860, registers_601, registers_602, registers_603)
(registers_604, registers_750, registers_7400, registers_e500): Delete
variables.
(struct variant): Delete nregs, npregs, num_tot_regs, and regs. Add
tdesc.
(tot_num_registers, num_registers, num_pseudo_registers): Delete.
(variants): Delete outdated comment. Use standard target descriptions
instead of "struct reg" arrays.
(init_variants): Delete.
(rs6000_gdbarch_init): Do not guess word size from the BFD
architecture if we have a target description. Select a variant
before creating a new architecture. Use the variant's target
description if the target did not define a register layout.
Validate target-supplied registers. Reject mismatches. Use
fixed register numbers and new constants instead of magic
numbers. Call set_gdbarch_ps_regnum. Call tdesc_use_registers.
(_initialize_rs6000_tdep): Initialize the preparsed target
descriptions.
* target-descriptions.c (tdesc_predefined_types): Add int128 and
uint128.
(tdesc_find_register_early): New function.
(tdesc_numbered_register): Use it.
(tdesc_register_size): New function.
(tdesc_use_registers): Take a target_desc argument. Do not use
gdbarch_target_desc.
* target-descriptions.h (tdesc_use_registers): Update prototype
and comment.
(tdesc_register_size): New prototype.
* Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c)
(powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c)
(powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c)
(powerpc_860_c, powerpc_e500_c, rs6000_c): New macros.
(rs6000-tdep.o): Update.
* arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers.
* m68k-tdep.c (m68k_gdbarch_init): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* gdb.texinfo (Predefined Target Types): Add int128
and uint128.
(Standard Target Features): Add PowerPC features.
* gdb.xml/tdesc-regs.exp: Add PowerPC support.
* sim-ppc.h (sim_spr_register_name): New prototype.
* gdb-sim.c (regnum2spr): Rename to...
(sim_spr_register_name): ... this. Make global.
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* callback.c (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add functions.
* syscall.c (cb_syscall): Test for stdin/out/err, not just fd 0/1/2.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.h (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add prototypes.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* sim/cris/c/freopen2.c: Added testcase.
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* callback.c (cb_is_stdin): Add.
* syscall.c (cb_syscall): Test for stdin, not just fd 0.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.h (cb_is_stdin): Add prototype.
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