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AgeCommit message (Expand)AuthorFilesLines
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger62-4206/+4359
2021-02-28sim: delete unused SIM_EXTRA_LIBDEPSMike Frysinger6-8/+14
2021-02-27sim: delete redundant SIM_EXTRA_ALLMike Frysinger10-9/+26
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger144-1197/+2156
2021-02-20sim: merge configure.tgt into configure.acMike Frysinger4-324/+207
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu2-3/+8
2021-02-13sim: testsuite: push $arch out to targetsMike Frysinger73-45/+274
2021-02-13sim: rx: mitigate fread warningMike Frysinger2-2/+8
2021-02-13sim: switch to AC_CONFIG_MACRO_DIRSMike Frysinger132-58741/+1168
2021-02-13sim: common: delete unused aclocal.m4Mike Frysinger2-15/+4
2021-02-08sim/rx: enable build with warningsAndrew Burgess3-1/+8
2021-02-08sim/rx: avoid pointer arithmetic on void * pointersAndrew Burgess3-6/+18
2021-02-08sim/rx: add some missing includesAndrew Burgess3-2/+8
2021-02-08sim/rx: use PRIx64 in printf format stringAndrew Burgess2-2/+7
2021-02-08sim/rx: move some variable declarations to the start of the blockAndrew Burgess3-3/+11
2021-02-08sim/rx: provide a format string for printfAndrew Burgess2-4/+9
2021-02-08sim/rx: delete an unused functionAndrew Burgess2-9/+4
2021-02-08sim/rx: mark some functions as staticAndrew Burgess4-3/+9
2021-02-08sim/rx: fill in missing 'void' for empty argument listsAndrew Burgess7-9/+21
2021-02-08sim/rx: fix an issue where we try to modify a const stringAndrew Burgess2-2/+6
2021-02-08sim/rx: define sim_memory_mapAndrew Burgess2-0/+12
2021-02-06sim: erc32/m32c/rl78: add sim_memory_map stub for gdbMike Frysinger6-0/+30
2021-02-06sim: watchpoints: use common sim_pc_getMike Frysinger25-54/+129
2021-02-06sim: add ChangeLog entries for last commitsMike Frysinger2-0/+12
2021-02-06sim: igen: drop libiberty linkageMike Frysinger3-10/+1
2021-02-06sim: common: switch AC_CONFIG_HEADERSMike Frysinger31-92/+61
2021-02-06sim: drop use of bfd/configure.hostMike Frysinger73-233/+434
2021-02-04gdb: riscv: enable sim integrationMike Frysinger2-0/+76
2021-02-04sim: riscv: new portMike Frysinger23-0/+18290
2021-01-31sim: cgen-trace: tweak printf callMike Frysinger2-1/+5
2021-01-31sim: bpf: fix mainloop extract callMike Frysinger2-1/+5
2021-01-31sim: bpf/or1k: fix CGEN_TRACE_EXTRACT nameMike Frysinger5-127/+138
2021-01-31sim: cgen-accfp: Fix pointer sign warningsStafford Horne2-3/+9
2021-01-31sim: v850: cleanup build warningsMike Frysinger4-107/+124
2021-01-31sim: v850: fix handling of SYS_timesMike Frysinger2-2/+5
2021-01-31sim: moxie: cleanup build warningsMike Frysinger4-6/+22
2021-01-30sim: common: change gennltvals helper to PythonMike Frysinger6-240/+243
2021-01-30sim: m68hc11: fix printf size warningsMike Frysinger2-1/+5
2021-01-30sim: m68hc11: localize a few functionsMike Frysinger2-6/+12
2021-01-30sim: m68hc11: tweak printf-style funcsMike Frysinger2-2/+6
2021-01-30sim: m68hc11: include stdlib.h for prototypesMike Frysinger3-0/+7
2021-01-30sim: watchpoints: change sizeof_pc to sizeof(sim_cia)Mike Frysinger23-16/+50
2021-01-30sim: profile: fix bucketing with 64-bit targetsMike Frysinger2-2/+6
2021-01-30sim: m68hc11: stop making hardware conditionalMike Frysinger3-32/+22
2021-01-30sim: hw: replace fgets with getlineMike Frysinger2-30/+41
2021-01-30sim: common: sort nltvals.defMike Frysinger3-90/+95
2021-01-29sim: readd myself as a maintainerMike Frysinger2-1/+5
2021-01-22MAINTAINERS: Update my e-mail addressMaciej W. Rozycki1-1/+1
2021-01-19sim: ppc: update version script usageMike Frysinger2-2/+7
2021-01-18sim: bfin: delete accidental ADI copyrightMike Frysinger2-1/+4
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