aboutsummaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Expand)AuthorFilesLines
2024-01-01sim: bfin: initial bf60x supportusers/vapier/sim/bfinMike Frysinger3-8/+169
2024-01-01se_all32bitopcodes: mark certain block of insns as invalid under simMike Frysinger1-0/+5
2024-01-01sim: bfin: add new GPIO model (bf60x)Mike Frysinger2-0/+381
2024-01-01sim: bfin: add new DDE (distributed DMA engine) model (bf60x)Mike Frysinger5-0/+772
2024-01-01sim: bfin: add new SMC (static memory) model (bf60x)Mike Frysinger4-0/+287
2024-01-01sim: bfin: add new EFS (Electronic Fuse Serial) model (bf60x)Mike Frysinger4-0/+226
2024-01-01sim: bfin: add new SPU (system protection unit) model (bf60x)Mike Frysinger4-0/+183
2024-01-01sim: bfin: add new SEC (system event controller) model (bf60x)Mike Frysinger4-0/+248
2024-01-01sim: bfin: add new CGU (clock generation) model (bf60x)Mike Frysinger4-0/+188
2024-01-01sim: bfin: add new UART model (bf60x)Mike Frysinger8-14/+379
2024-01-01sim: bfin: handle invalid dsp32 mac/mult insnsMike Frysinger1-7/+52
2024-01-01b/sim/testsuite/sim/bfin/se_undefinedinstruction3.S is broke? need to test on...Mike Frysinger1-0/+1
2024-01-01sim: skip sysroot for most syscallsMike Frysinger1-9/+31
2024-01-01Revert "sim: bfin: add proper regs to dmac"Mike Frysinger3-47/+0
2024-01-01sim: bfin: add proper regs to dmacMike Frysinger3-0/+47
2024-01-01sim: bfin: make the core timer output port an edgeMike Frysinger1-0/+2
2024-01-01sim: bfin: keep output port levels from SIC level and up-to-dateMike Frysinger1-24/+25
2024-01-01sim: bfin: separate port levels from isa levels in the CECMike Frysinger1-3/+25
2024-01-01sim: tweak signed to unsigned local varsMike Frysinger6-21/+22
2024-01-01sim: bfin: add bootromsMike Frysinger28-0/+82432
2024-01-01sim: ppc: merge misc igen APIsMike Frysinger10-292/+82
2024-01-01sim: ppc: rework igen error to match commonMike Frysinger10-22/+25
2024-01-01sim: igen: extend error to take argumentsMike Frysinger1-2/+2
2024-01-01sim: ppc: rename igen max_insn_bit_sizeMike Frysinger3-5/+5
2024-01-01sim: igen: minor constify logicMike Frysinger1-2/+2
2024-01-01sim: ppc: unify igen filter_filename implementationsMike Frysinger7-91/+8
2024-01-01sim: ppc: replace filter_filename with lbasenameMike Frysinger2-15/+8
2024-01-01sim: ppc: hoist igen compilation into top-levelMike Frysinger3-153/+325
2024-01-01sim: ppc: drop build-config.h usageMike Frysinger8-73/+0
2024-01-01sim: ppc: simplify filter_host.c logicMike Frysinger2-7/+19
2024-01-01sim: igen: remove libigen.a when cleaningMike Frysinger2-8/+8
2024-01-01sim: ppc: drop unused host bitsize settingsMike Frysinger3-5/+0
2024-01-01sim: frv: fix cmpb uninitialized variable usageMike Frysinger1-0/+1
2024-01-01sim: arm: mark local read-only arrays as static constMike Frysinger1-2/+2
2024-01-01sim: warnings: enable -Wunused-variableMike Frysinger2-2/+2
2024-01-01cpu: or1k: drop unused l.swa flagMike Frysinger2-2/+0
2024-01-01sim: fix pervasive typoTom Tromey9-42/+42
2023-12-28sim: pru: Fix emulation of carry bitDimitar Dimitrov2-4/+424
2023-12-26sim: common: pull in newlib extensions for Linux compatibilityMike Frysinger2-1/+122
2023-12-24sim: cris: rvdummy: delete unused variableMike Frysinger1-1/+0
2023-12-24sim: cgen: mark cgen_rtx_error noreturnMike Frysinger1-1/+1
2023-12-24sim: cgen: regenerate decode tablesMike Frysinger9-5827/+5827
2023-12-24sim: sh: refine pwsb & pwad nopsMike Frysinger1-0/+2
2023-12-24sim: sh: fix plds Dz,MACL implementationMike Frysinger1-1/+1
2023-12-23sim: warnings: rework individual flag disable into dedicated varsMike Frysinger4-51/+157
2023-12-22sim: sh: fix -Wshadow=local warningsMike Frysinger1-2/+2
2023-12-22sim: riscv: fix -Wshadow=local warningsMike Frysinger1-6/+4
2023-12-22sim: ppc: fix -Wshadow=local warningsMike Frysinger1-3/+3
2023-12-22sim: mips: fix -Wshadow=local warningsMike Frysinger1-5/+2
2023-12-22sim: m68hc11: fix -Wshadow=local warningsMike Frysinger3-4/+3