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AgeCommit message (Expand)AuthorFilesLines
2021-03-13sim: rename BUILD_LDFLAGS to LDFLAGS_FOR_BUILDMike Frysinger8-5/+31
2021-03-13sim: introduce {COMPILE,LINK}_FOR_BUILDMike Frysinger16-49/+111
2021-03-08Enable maintainer mode for simTom Tromey5-16/+80
2021-03-08sim: delete unused BUILD_LIBS settingMike Frysinger10-16/+38
2021-03-07sim: igen: update options APIMike Frysinger4-3/+9
2021-03-07RegeneratedJeff Law2-6/+19
2021-03-07sim: testsuite: merge into toplevel automakeMike Frysinger11-201/+142
2021-03-07sim: switch top level to automakeMike Frysinger10-520/+3101
2021-02-28sim: igen: drop config.h & header checkingMike Frysinger12-1125/+58
2021-02-28sim: igen: delete more unused toolchain settingsMike Frysinger4-122/+7
2021-02-28sim: igen: delete unused FOR_BUILD varsMike Frysinger4-24/+7
2021-02-28sim: set up build-time compiler settingsMike Frysinger32-277/+313
2021-02-28sim: use AC_CHECK_TOOL to find arMike Frysinger32-93/+2793
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger62-4206/+4359
2021-02-28sim: delete unused SIM_EXTRA_LIBDEPSMike Frysinger6-8/+14
2021-02-27sim: delete redundant SIM_EXTRA_ALLMike Frysinger10-9/+26
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger144-1197/+2156
2021-02-20sim: merge configure.tgt into configure.acMike Frysinger4-324/+207
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu2-3/+8
2021-02-13sim: testsuite: push $arch out to targetsMike Frysinger73-45/+274
2021-02-13sim: rx: mitigate fread warningMike Frysinger2-2/+8
2021-02-13sim: switch to AC_CONFIG_MACRO_DIRSMike Frysinger132-58741/+1168
2021-02-13sim: common: delete unused aclocal.m4Mike Frysinger2-15/+4
2021-02-08sim/rx: enable build with warningsAndrew Burgess3-1/+8
2021-02-08sim/rx: avoid pointer arithmetic on void * pointersAndrew Burgess3-6/+18
2021-02-08sim/rx: add some missing includesAndrew Burgess3-2/+8
2021-02-08sim/rx: use PRIx64 in printf format stringAndrew Burgess2-2/+7
2021-02-08sim/rx: move some variable declarations to the start of the blockAndrew Burgess3-3/+11
2021-02-08sim/rx: provide a format string for printfAndrew Burgess2-4/+9
2021-02-08sim/rx: delete an unused functionAndrew Burgess2-9/+4
2021-02-08sim/rx: mark some functions as staticAndrew Burgess4-3/+9
2021-02-08sim/rx: fill in missing 'void' for empty argument listsAndrew Burgess7-9/+21
2021-02-08sim/rx: fix an issue where we try to modify a const stringAndrew Burgess2-2/+6
2021-02-08sim/rx: define sim_memory_mapAndrew Burgess2-0/+12
2021-02-06sim: erc32/m32c/rl78: add sim_memory_map stub for gdbMike Frysinger6-0/+30
2021-02-06sim: watchpoints: use common sim_pc_getMike Frysinger25-54/+129
2021-02-06sim: add ChangeLog entries for last commitsMike Frysinger2-0/+12
2021-02-06sim: igen: drop libiberty linkageMike Frysinger3-10/+1
2021-02-06sim: common: switch AC_CONFIG_HEADERSMike Frysinger31-92/+61
2021-02-06sim: drop use of bfd/configure.hostMike Frysinger73-233/+434
2021-02-04gdb: riscv: enable sim integrationMike Frysinger2-0/+76
2021-02-04sim: riscv: new portMike Frysinger23-0/+18290
2021-01-31sim: cgen-trace: tweak printf callMike Frysinger2-1/+5
2021-01-31sim: bpf: fix mainloop extract callMike Frysinger2-1/+5
2021-01-31sim: bpf/or1k: fix CGEN_TRACE_EXTRACT nameMike Frysinger5-127/+138
2021-01-31sim: cgen-accfp: Fix pointer sign warningsStafford Horne2-3/+9
2021-01-31sim: v850: cleanup build warningsMike Frysinger4-107/+124
2021-01-31sim: v850: fix handling of SYS_timesMike Frysinger2-2/+5
2021-01-31sim: moxie: cleanup build warningsMike Frysinger4-6/+22
2021-01-30sim: common: change gennltvals helper to PythonMike Frysinger6-240/+243
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