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2021-02-04gdb: riscv: enable sim integrationMike Frysinger2-0/+76
2021-02-04sim: riscv: new portMike Frysinger23-0/+18290
2021-01-31sim: cgen-trace: tweak printf callMike Frysinger2-1/+5
2021-01-31sim: bpf: fix mainloop extract callMike Frysinger2-1/+5
2021-01-31sim: bpf/or1k: fix CGEN_TRACE_EXTRACT nameMike Frysinger5-127/+138
2021-01-31sim: cgen-accfp: Fix pointer sign warningsStafford Horne2-3/+9
2021-01-31sim: v850: cleanup build warningsMike Frysinger4-107/+124
2021-01-31sim: v850: fix handling of SYS_timesMike Frysinger2-2/+5
2021-01-31sim: moxie: cleanup build warningsMike Frysinger4-6/+22
2021-01-30sim: common: change gennltvals helper to PythonMike Frysinger6-240/+243
2021-01-30sim: m68hc11: fix printf size warningsMike Frysinger2-1/+5
2021-01-30sim: m68hc11: localize a few functionsMike Frysinger2-6/+12
2021-01-30sim: m68hc11: tweak printf-style funcsMike Frysinger2-2/+6
2021-01-30sim: m68hc11: include stdlib.h for prototypesMike Frysinger3-0/+7
2021-01-30sim: watchpoints: change sizeof_pc to sizeof(sim_cia)Mike Frysinger23-16/+50
2021-01-30sim: profile: fix bucketing with 64-bit targetsMike Frysinger2-2/+6
2021-01-30sim: m68hc11: stop making hardware conditionalMike Frysinger3-32/+22
2021-01-30sim: hw: replace fgets with getlineMike Frysinger2-30/+41
2021-01-30sim: common: sort nltvals.defMike Frysinger3-90/+95
2021-01-29sim: readd myself as a maintainerMike Frysinger2-1/+5
2021-01-22MAINTAINERS: Update my e-mail addressMaciej W. Rozycki1-1/+1
2021-01-19sim: ppc: update version script usageMike Frysinger2-2/+7
2021-01-18sim: bfin: delete accidental ADI copyrightMike Frysinger2-1/+4
2021-01-18sim: common: simplify version scriptMike Frysinger3-13/+15
2021-01-18sim: common: delete configure & MakefileMike Frysinger9-3891/+208
2021-01-18sim: common: modernize gennltvals.shMike Frysinger5-167/+244
2021-01-15sim: testsuite: flatten treeMike Frysinger2860-1/+5
2021-01-15sim: testsuite: delete configure scriptMike Frysinger7-3133/+27
2021-01-15sim: d10v: relocate tests & clean up test harnessMike Frysinger58-3434/+300
2021-01-15sim: mips: delete empty stub test dirMike Frysinger7-3200/+7
2021-01-15sim: frv: clean up redundant test coverageMike Frysinger14-3219/+48
2021-01-15sim: m32r: clean up redundant test coverageMike Frysinger11-3203/+14
2021-01-15sim: testsuite: allow tests to declare expected exit statusMike Frysinger5-13/+32
2021-01-13sim: h8300: drop separate eightbit memory bufferMike Frysinger3-74/+32
2021-01-13sim: watch: add basic default handler that trapsMike Frysinger2-1/+18
2021-01-13sim: watch: fix range expression processingMike Frysinger2-1/+5
2021-01-13sim: watch: fix pc watchpoints on little endian host systemsMike Frysinger4-5/+14
2021-01-12sim: or1k: fix mixing of code & decl warningMike Frysinger2-3/+10
2021-01-12sim: or1k: clean up stale build entriesMike Frysinger2-11/+8
2021-01-12sim: README-HACKING: clean up stale run referencesMike Frysinger2-2/+4
2021-01-12sim: common: use #error properlyMike Frysinger2-1/+5
2021-01-12sim: or1k: delete redundant SIM_AC_OPTION_INLINE callMike Frysinger3-34/+16
2021-01-11sim: tests: get common tests working againMike Frysinger4-41/+46
2021-01-11sim: always call SIM_AC_OPTION_WARNINGSMike Frysinger2-1/+7
2021-01-11sim: call SIM_AC_OPTION_WARNINGS(no) in remaining portsMike Frysinger30-20/+1130
2021-01-11sim: or1k: fix include ordering with sim-main.hMike Frysinger2-0/+6
2021-01-11sim: common: fix printf formatsMike Frysinger2-1/+6
2021-01-11sim: rl78: move storage out of headerMike Frysinger3-1/+8
2021-01-11sim: clean up C11 header includesMike Frysinger182-1090/+1097
2021-01-09sim: replace rindex with strrchrMike Frysinger2-2/+6