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1996-12-20 * support.h: Use _WIN32 instead of __WIN32__. Also add defs forStu Grossman2-2/+9
SIGTRAP and SIGQUIT for _WIN32.
1996-12-19 * gencode.c (build_instruction) [MUL]: Cast operands to word64, toIan Lance Taylor2-1/+14
force a 64 bit multiplication. (build_instruction) [OR]: In mips16 mode, don't do anything if the destination register is 0, since that is the default mips16 nop instruction.
1996-12-18 * interp.c (sim_resume): Handle 0xff as a single byte insn.Jeff Law2-12/+19
* simops.c: Fix overflow computation for "add" and "inc" instructions.
1996-12-17Getting there ...David Edelsohn2-0/+35
1996-12-16 * simops.c: Handle "break" instruction.Jeff Law2-0/+12
1996-12-16 Link with SIM_EXTRA_LIBS, not just EXTRA_LIBS, which is never set.Rob Savoye1-3/+12
1996-12-16 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.Ian Lance Taylor2-10/+19
(build_endian_shift): Don't check proc64. (build_instruction): Always set memval to uword64. Cast op2 to uword64 when shifting it left in memory instructions. Always use the same code for stores--don't special case proc64.
1996-12-16Mon Dec 16 13:39:03 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+9
* interp.c (xfer_mem): Change unified memory to 0x0.
1996-12-16 * gencode.c (build_mips16_operands): Fix base PC value for PCIan Lance Taylor3-119/+95
relative operands. (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a jal instruction. * interp.c (simJALDELAYSLOT): Define. (JALDELAYSLOT): Define. (INDELAYSLOT, INJALDELAYSLOT): Define. (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1996-12-16 * simops.c: Fix restoring the PC for "ret" and "retf" instructions.Jeff Law2-4/+23
1996-12-11For NEC 4100/4300 project: Add little endian support and misc cleanups.Jim Wilson1-1/+1
* gencode.c (build_instruction): Use !ByteSwapMem instead of BigEndianMem. * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete. (BigEndianMem): Rename to ByteSwapMem and change sense. (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change BigEndianMem references to !ByteSwapMem. (set_endianness): New function, with prototype. (sim_open): Call set_endianness. (sim_info): Use simBE instead of BigEndianMem. (xfer_direct_word, xfer_direct_long, swap_direct_word, swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word, xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER ifdefs, keeping the prototype declaration. (swap_word): Rewrite correctly. (ColdReset): Delete references to CONFIG. Delete endianness related code; moved to set_endianness.
1996-12-11 * gencode.c (write_opcodes): Also write out the format of theJeff Law1-3/+4
opcode. * mn10300_sim.h (simops): Add "format" field. * interp.c (sim_resume): Deal with endianness issues here.
1996-12-10 * simops.c (REG0_4): Define.Jeff Law2-8/+14
Use REG0_4 for indexed loads/stores. Fixes bugs exposed after minor codegen improvements in the compiler.
1996-12-10For NEC 4100/4300 projectJim Wilson3-69/+145
* gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits. * interp.c (CHECKHILO): Define away. (simSIGINT): New macro. (membank_size): Increase from 1MB to 2MB. (control_c): New function. (sim_resume): Rename parameter signal to signal_number. Add local variable prev. Call signal before and after simulate. (sim_stop_reason): Add simSIGINT support. (sim_warning, sim_error, dotrace, SignalException): Define as stdarg functions always. (sim_warning): Delete call to SignalException. Do call printf_filtered if logfh is NULL. (AddressTranslation): Add #ifdef DEBUG around debugging message and a call to sim_warning.
1996-12-10New revision from AndrewMichael Meissner8-377/+3635
1996-12-09 * callback.c: #include <stdlib.h>David Edelsohn2-0/+459
(os_error): New function. (default_callback): Add os_error.
1996-12-07 * simops.c (REG0_16): Fix typo.Jeff Law2-1/+5
1996-12-07Add missing semicolons in last change.Jeff Law1-13/+13
1996-12-06 * simops.c: Call abort for any instruction that's not currentlyJeff Law2-0/+16
simulated.
1996-12-06 * simops.c: Define accessor macros to extract registerJeff Law2-368/+329
values from instructions. Use them consistently.
1996-12-06 * interp.c: Delete unused global variable "OP".Jeff Law3-31/+30
(sim_resume): Remove unused variable "opcode". * simops.c: Fix some uninitialized variable problems, add parens to fix various -Wall warnings. Fixing assorted -Wall problems.
1996-12-06Opps. Forgot something in last change.Jeff Law1-1/+1
1996-12-06 * gencode.c (write_header): Add "insn" and "extension" argumentsJeff Law5-248/+699
to the OP_* declarations. (write_template): Similarly for function templates. * interp.c (insn, extension): Remove global variables. Instead pass them as arguments to the OP_* functions. * mn10300_sim.h: Remove decls for "insn" and "extension". * simops.c (OP_*): Accept "insn" and "extension" as arguments instead of using globals. Starting to clean things up.
1996-12-06 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"Jeff Law2-3/+5
Fixes remaining hangs while running c-torture execution tests. Only 12 c-torture execution failures left: * 920625-1.c fails all 6 execution tests. * 960521-1.c fails all 6 execution tests.
1996-12-06 * simops.c: Fix thinkos in last change to "inc dn".Jeff Law2-5/+11
1996-12-04 * simops.c: "add imm,sp" does not effect the condition codes.Jeff Law2-31/+20
"inc dn" does effect the condition codes. Just something I noticed.
1996-12-04 * simops.c: Treat both operands as signed values forJeff Law2-2/+13
"div" instruction. Fixes another dozen c-torture execution failures.
1996-12-04 * configure.in: Look for libtermcap.a.Rob Savoye3-64/+132
* Makefile.in: Only link in -ltermcap if it exists. * erc32.c: Update to version 2.6a. Fix uart handling. * exec.c: Update to version 2.6a. Add sparclite support. * float.c: Update to version 2.6a. Convert comments to preprocessor warnings. Add __setfpucw() for i385 hosts so floating point exceptions work. * func.c: Update to version 2.6a. Fix uart handling, add support for user error traps. * help.c: Update to version 2.6a. Add help note on user error traps. * interf.c: Update to version 2.6a. Fix uart handling, and add sparclite support. * examples/gccx: Use sparclite cross compiler, not native gcc. * examples/srt0.S: Use "mov" rather than "wr" for manipulating the psr register.
1996-12-04 * simops.c: Fix simulation of division instructions.Jeff Law1-12/+8
Fix typos/thinkos in several "cmp" and "sub" instructions. Another couple dozen c-torture failures fixed.
1996-12-02 * simomps.c: Fix carry bit handling in "sub" and "cmp"Jeff Law1-9/+9
instructions. Another dozen execution failures fixed.
1996-12-02 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".Jeff Law2-2/+6
Fixes 80 or so c-torture execution failures. 400 to go.
1996-12-02 * simops.c: Fix overflow computation for many instructions.Jeff Law2-87/+89
Fixes several hangs in the c-torture execution tests. Also fixes about 40 failures.
1996-12-02 * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)".Jeff Law2-5/+7
Along with some compiler, bfd, assembler changes this fixes 90 or so c-torture execution failures.
1996-12-02 * simops.c: Fix "mov am, dn".Jeff Law2-1/+3
Fixes more c-torture problems.
1996-12-01 * simops.c: Fix more bugs in "add imm,an" andJeff Law2-8/+13
"add imm,dn". Fixes a half-dozen (of several hundred :( c-torture failures.
1996-11-27 * simops.c: Fix bugs in "movm" and "add imm,an".Jeff Law2-17/+19
main(){write (0, "hello world\n", 13);} works!
1996-11-27 * simops.c: Don't lose the upper 24 bits of the returnJeff Law2-16/+154
pointer in "call" and "calls" instructions. Rough cut at emulated system calls.
1996-11-27 * simops.c: Implement the remaining 5, 6 and 7 byte instructions.Jeff Law2-50/+168
Everything except the extended instructions, the loop instructions, trap, rti, and rtm.
1996-11-27 * simops.c Implement remaining 4 byte instructions.Jeff Law2-39/+145
1996-11-27 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORDIan Lance Taylor1-0/+3
16 bit instructions.
1996-11-27 * simops.c Implement remaining 3 byte instructions.Jeff Law2-32/+120
Moving right along...
1996-11-27 * simops.c: Implement remaining 2 byte instructions. CallJeff Law2-23/+120
abort for instructions we're not implementing now.
1996-11-27Actually check in the right change to interp.c.Ian Lance Taylor1-2/+1
1996-11-27 * simops.c: Implement lots of random instructions.Jeff Law2-129/+642
Implments most instructions with first nibble 0x0 - 0xe and those with the first byte 0xf0 - 0xf2.
1996-11-27 * simops.c: Implement "movm" and "bCC" insns.Jeff Law2-7/+160
Function calls and conditional branches work!
1996-11-27 * mn10300_sim.h (_state): Add another register (MDR).Jeff Law3-9/+199
(REG_MDR): Define. * simops.c: Implement "cmp", "calls", "rets", "jmp" and a few additional random insns. We can now function calls. We get out of crt0 into main now, then lose when calls are nested (because don't handle movm yet).
1996-11-26 * mn10300_sim.h (PSW_*): Define for CC status tracking.Jeff Law3-20/+310
(REG_D0, REG_A0, REG_SP): Define. * simops.c: Implement "add", "addc" and a few other random instructions. Starting to simulate instructions for the mn10300. Executes some of the crt0 code now!
1996-11-26 * gencode.c, interp.c: Snapshot current simulator code.Jeff Law3-3/+27
(crude) hashing works, along with dispatch to the OP_* functions.
1996-11-26 Add support for mips16 (16 bit MIPS implementation):Ian Lance Taylor3-1062/+1631
* gencode.c (inst_type): Add mips16 instruction encoding types. (GETDATASIZEINSN): Define. (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and mtlo. (MIPS16_DECODE): New table, for mips16 instructions. (bitmap_val): New static function. (struct mips16_op): Define. (mips16_op_table): New table, for mips16 operands. (build_mips16_operands): New static function. (process_instructions): If PC is odd, decode a mips16 instruction. Break out instruction handling into new build_instruction function. (build_instruction): New static function, broken out of process_instructions. Check modifiers rather than flags for SHIFT bit count and m[ft]{hi,lo} direction. (usage): Pass program name to fprintf. (main): Remove unused variable this_option_optind. Change ``*loptarg++'' to ``loptarg++''. (my_strtoul): Parenthesize && within ||. * interp.c (sim_trace): If tracefh is NULL, set it to stderr. (LoadMemory): Accept a halfword pAddr if vAddr is odd. (simulate): If PC is odd, fetch a 16 bit instruction, and increment PC by 2 rather than 4. * configure.in: Add case for mips16*-*-*. * configure: Rebuild.
1996-11-26Regenerated since aclocal.m4 changed.David Edelsohn1-41/+378
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