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AgeCommit message (Expand)AuthorFilesLines
1997-09-18sanitization fixes. typoes, missing fences, "start" instead of "end", etc.Felix Lee1-8/+2
1997-09-18add missing files.Felix Lee4-1/+44
1997-09-18v850 files that weren't being removed if !keep-v850Felix Lee2-2/+6
1997-09-17 * sim-main.h (kill): macro was missing args.Felix Lee2-1/+10
1997-09-17Test US bit of v850eq.Andrew Cagney3-0/+65
1997-09-17Clean up more tracing.Andrew Cagney5-211/+112
1997-09-17* sim-events.c (ETRACE): Use trace_printf not sim_io_printf forAndrew Cagney1-0/+10
1997-09-17Fix tracing for: "ctret", "bsw", "hsw"Andrew Cagney4-144/+140
1997-09-17Define MOVED macro, move sub-bitfield from XXX to YYY.Andrew Cagney1-0/+4
1997-09-17More v850 simulator tests.Andrew Cagney8-8/+62
1997-09-17More v850 simulator tests.Andrew Cagney12-23/+1114
1997-09-17Add/test 8bit bit manipuation macros.Andrew Cagney2-32/+71
1997-09-16Generic rules for building simple simulator test programs.Andrew Cagney1-0/+48
1997-09-16 * sim/mips/gencode.c (build_instruction): Don't need to subtract 4 forGavin Romig-Koch2-1/+7
1997-09-16 * sim/mips/interp.c: Correct some HASFPU problems.Gavin Romig-Koch2-5/+19
1997-09-16Smooth some of ALU tracing's rough edges.Andrew Cagney5-277/+292
1997-09-16More sim-bits testing.Andrew Cagney2-4/+37
1997-09-16Add {LS,MS}SEXT and {LS,MS}INSERTED macros. Eliminates bug in SEXT.Andrew Cagney3-25/+107
1997-09-16Use trace_one_insn in trace functions. Buffer up trace data so thatAndrew Cagney3-164/+133
1997-09-16v850eq simulator tests.Andrew Cagney6-0/+132
1997-09-16Restrict ldsr (load system register) to modifying just non-reserved PSW bits.Andrew Cagney5-59/+55
1997-09-16Add v850e version of breakpoint instruction.Andrew Cagney4-5/+34
1997-09-16Differentiate between a non-zero string and a constant zero field.Andrew Cagney1-0/+5
1997-09-16 * simops.c (Multiply64): Don't store into register zero.Jim Wilson2-2/+11
1997-09-15For instructions moved into v850.igen was computing (wrong) NIA whenAndrew Cagney4-14/+28
1997-09-15 * igen.c (gen_run_c): Handle non-multi-sim case.Andrew Cagney2-22/+36
1997-09-15Fix sanitization for v850 V v850e V v850eqAndrew Cagney5-429/+506
1997-09-15Update to reflect change to sim/common/aclocal.m4 (allow sim/commonAndrew Cagney9-26/+55
1997-09-15For v850eq start up with US bit set.Andrew Cagney6-333/+244
1997-09-15Determine ARCHITECTURE from program if possible.Andrew Cagney2-2/+14
1997-09-15 * callback.c (os_write): divert stdout and stderr to theirAndrew Cagney1-0/+5
1997-09-12Check reserved bits before executing instructions.Andrew Cagney7-43/+144
1997-09-12v850eq wasn't building igen directory.Andrew Cagney3-0/+9
1997-09-12Add profiling support to v850*.Andrew Cagney6-16/+83
1997-09-12Short form of sample-size option had wrong value.Andrew Cagney2-1/+6
1997-09-12v850* wants igenAndrew Cagney1-0/+8
1997-09-12Generate instruction profile call with each instruction.Andrew Cagney1-0/+6
1997-09-11Wed Sep 10 22:30:24 1997 Martin M. Hunt <hunt@cygnus.com>Martin Hunt1-0/+7
1997-09-10mips/sim_info was just returning?????Andrew Cagney2-2/+4
1997-09-10o Wordwrap usage messages from sim-optionsAndrew Cagney5-17/+81
1997-09-10(gen_itable_h): Output an enum defining the max size of the itableAndrew Cagney1-0/+7
1997-09-10Have trace_input, trace_output use sim-trace for IO.Andrew Cagney2-47/+66
1997-09-10 * inst.h (sim_state): rename to h8300_sim_state, to avoid conflictFelix Lee3-2/+13
1997-09-10Add option architecture-info to list supported architectures.Andrew Cagney2-0/+26
1997-09-10Support tx19 sanitation.Gavin Romig-Koch1-0/+30
1997-09-10 * sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoidFelix Lee2-1/+7
1997-09-10 * interp.c (sim_resume): poll_quit() at least once per call;Felix Lee1-0/+5
1997-09-09 * nltvals.def: Regenerate.David Edelsohn1-0/+4
1997-09-09Better word error messages.Andrew Cagney2-2/+7
1997-09-09Remove GCC specific `0x...LL', replace with SIGNED64 (0x...).Andrew Cagney2-14/+17